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Generalized Reactivity(1) Synthesis without a Monolithic Strategy

  • Conference paper

Part of the Lecture Notes in Computer Science book series (LNPSE,volume 7261)

Abstract

We present a new approach to synthesizing systems from Generalized Reactivity(1) specifications. Our method does not require a monolithic strategy, which can be prohibitively large. Instead, our approach constructs a circuit directly from the iterates of the fixpoint computation that computes the winning region. We build the overall system by combining these circuit parts. Our approach has generally lower memory requirements than previous GR(1) synthesis approaches, and is also faster. In addition to that, the circuits we build are eager, in the sense that they typically fulfill system guarantees faster than the circuits obtained with previous approaches, as experiments show.

Keywords

  • Generalize Reactivity
  • Linear Temporal Logic
  • Winning Strategy
  • Guarantee State
  • Binary Decision Diagram

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

This work was supported in part by the European Commission through project DIAMOND (FP7-2009-IST-4-248613).

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Schlaipfer, M., Hofferek, G., Bloem, R. (2012). Generalized Reactivity(1) Synthesis without a Monolithic Strategy. In: Eder, K., Lourenço, J., Shehory, O. (eds) Hardware and Software: Verification and Testing. HVC 2011. Lecture Notes in Computer Science, vol 7261. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-34188-5_6

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  • DOI: https://doi.org/10.1007/978-3-642-34188-5_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-34187-8

  • Online ISBN: 978-3-642-34188-5

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