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Formal Software Verification at Model and at Source Code Levels

  • Anthony Fernandes Pires
  • Thomas Polacsek
  • Stéphane Duprat
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7602)

Abstract

In a software development cycle, it is often more than half of the development time that is dedicated to verification activities. Formal methods offer new possibilities for verification. In the specification phase, simulation or model-checking allow users to detect errors in models. In the implementation phase, analysis techniques, like static analysis, make the verification tasks more exhaustive and more automatic. In that context, we propose to take advantage of these methods to improve embedded software development processes based on the V-model.

Keywords

Verification formal methods development process Model Based Engineering 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Anthony Fernandes Pires
    • 1
    • 2
  • Thomas Polacsek
    • 1
  • Stéphane Duprat
    • 2
  1. 1.ONERAToulouseFrance
  2. 2.Atos Intégration SASToulouse cedex 03France

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