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3D Hardware Canaries

  • Conference paper

Part of the Lecture Notes in Computer Science book series (LNSC,volume 7428)

Abstract

3D integration is a promising advanced manufacturing process offering a variety of new hardware security protection opportunities. This paper presents a way of securing 3D ICs using Hamiltonian paths as hardware integrity verification sensors. As 3D integration consists in the stacking of many metal layers, one can consider surrounding a security-sensitive circuit part by a wire cage.

After exploring and comparing different cage construction strategies (and reporting preliminary implementation results on silicon), we introduce a ”hardware canary”. The canary is a spatially distributed chain of functions F i positioned at the vertices of a 3D cage surrounding a protected circuit. A correct answer (F n  ∘ … ∘ F 1)(m) to a challenge m attests the canary’s integrity.

Keywords

  • Metal Layer
  • Hamiltonian Cycle
  • Hamiltonian Path
  • Black Vertex
  • White Vertex

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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© 2012 International Association for Cryptologic Research

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Briais, S. et al. (2012). 3D Hardware Canaries. In: Prouff, E., Schaumont, P. (eds) Cryptographic Hardware and Embedded Systems – CHES 2012. CHES 2012. Lecture Notes in Computer Science, vol 7428. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-33027-8_1

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  • DOI: https://doi.org/10.1007/978-3-642-33027-8_1

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-33026-1

  • Online ISBN: 978-3-642-33027-8

  • eBook Packages: Computer ScienceComputer Science (R0)