Abstract
Three dimensional integration has offered a paradigm shift to the VLSI design industry. It provides increased system integration by either increasing functionality or combining different technologies. Routing phase in 3D ICs plays a critical role during the layout design of 3D ICs. With much more design complexity together with close proximity of the increasing numbers of routing nodes this problem again becomes worse in presence of obstacles across the routing layers. This obstacle aware routing tree construction has become a challenging problem among the researchers recently. In this work, an efficient algorithm has been proposed for the rectilinear minimum Steiner tree (RMST) construction in presence of obstacles across the routing layers using a farthest pair approach. Due to ever increasing design complexity issues, careful measures have been taken to reduce the time complexity of the proposed algorithm. The novelties of this work may be stated as follows (i) proposed algorithm helps to construct an RMST in presence of obstacles, (ii) time complexity of the proposed algorithm is very much competitive with available tools, (iii) proposed algorithm efficiently reduces the number of Steiner points during the construction of RMST in presence of obstacles in comparison to the standard solution available in absence of obstacles. Experimental results are quite encouraging.
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References
Li, L., Young, E.F.Y.: Obstacle-avoiding Rectilinear Steiner Tree Construction. In: Proceedings of International Conference on Computer-Aided Design (ICCAD), pp. 523–528 (2008)
Huang, T., Young, E.F.Y.: Obstacle-avoiding Rectilinear Steiner Minimum Tree Construction: An Optimal Approach. In: Proceedings of International Conference on Computer Aided Design (ICCAD), pp. 610–613 (2010)
Ganley, J.L., Cohoon, J.P.: Optimal Rectilinear Steiner Tree Routing in the Presence of Obstacles. In: Proceedings of IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (1993)
Hu, Y., Feng, Z., Jing, T., Hong, X., Yang, Y., Yu, G., Hu, X., Yan, G.: FORst: A 3-step heuristic for obstacle-avoiding rectilinear Steiner minimum tree construction. Journal of Information & Computational Science 1(3), 107–116 (2004)
Shi, Y., Mesa, P., Yu, H., He, L.: Circuit-Simulated Obstacle-Aware Steiner Routing. ACM Transactions on Design Automation of Electronic Systems 12(3), Article 28 (August 2007)
Liu, J., Zhao, Y., Shragowitz, E., Karypis, G.: A Polynomial Time Approximation Scheme for Rectilinear Steiner Minimum Tree Construction in the Presence of Obstacles. In: 9th International Conference on Electronics, Circuits and Systems, vol. 2, pp. 781–784 (2002)
Sapatnekar, S., Goplen, B.: Placement of 3D ICs with thermal and inter-layer via considerations. In: Design Automation Conference, pp. 626–631 (June 2007)
Kahng, A.B., Robins, G.: A New Class of Steiner Tree Heuristics with Good Performance: The Iterated 1-Steiner approach. In: International Conference on CAD (1990)
Xie, Y., Cong, J., Sapatnekar, S.: Three-Dimensional Integrated Circuit Design. Integrated Circuits and Systems. Springer (2009)
Deng, Y., Maly, W.: Interconnect Characteristics of 2.5d system integration scheme. In: ACM International Symposium on Physical Design, pp. 171–175 (April 2001)
Yan, J.-T., Jhong, M.-C., Zhi, W.C.: Obstacle-Aware Longest Path using Rectangular Pattern Detouring in Routing Grids. In: Asia and South Pacific Design Automation Conference, ASPDAC (2010)
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Ghosal, P., Das, S., Das, A. (2013). A New Class of Obstacle Aware Steiner Routing in 3D Integrated Circuits. In: Meghanathan, N., Nagamalai, D., Chaki, N. (eds) Advances in Computing and Information Technology. Advances in Intelligent Systems and Computing, vol 178. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31600-5_68
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DOI: https://doi.org/10.1007/978-3-642-31600-5_68
Publisher Name: Springer, Berlin, Heidelberg
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