Abstract
Reversible logic is emerging computing paradigm with applications in Ultra-low power Nano computing, quantum computing, Low power CMOS design, Optical Information Processing, Bioinformatics etc. In this paper, the 4x4 reversible multiplier circuit is proposed with the design of new reversible gate called RAM. The proposed multiplier circuit is efficient compared to the existing designs in terms of gate counts, garbage outputs, constant inputs and quantum cost. The design can be generalized to construct NxN reversible multiplier circuit.
This is a preview of subscription content, log in via an institution.
Buying options
Tax calculation will be finalised at checkout
Purchases are for personal use only
Learn about institutional subscriptionsPreview
Unable to display preview. Download preview PDF.
References
Landauer, R.: Irreversibility and Heat Generation in the Computational Process. IBM J. of Research and Development 5, 183–191 (1961)
Bennett, C.H.: Logical Reversibility of Computation. IBM J. of Research and Development 17, 525–532 (1973)
Kerntopf, P., et al.: On Universality of General Reversible Multiple Valued Logic Gates. In: IEEE International Symposium Multiple Valued Logic, pp. 68–73 (2004)
Feynman, R.P.: Quantum Mechanical Computers. Optics News 11, 11–20 (1985)
Toffoli, T.: Reversible Computing. Technical Memo MIT/LCS/TM-151, MIT Lab for Computer Science (1980)
Fredkin, E., Toffoli, T.: Conservative Logic. International J. of Theoretical Physics 21, 219–253 (1985)
Peres, A.: Reversible Logic and Quantum Computers. International J. Physical Review General Physics 32, 3266–3276 (1985)
Hung, W.N.N., et al.: Optimal Synthesis of Multiple Output Boolean Functions Using a Set of Quantum Gates by Symbolic Reachability Analysis. IEEE Trans. on Computer-Aided Design of Integrated Circuits and Systems 25, 1652–1663 (2006)
Thapliyal, H., Ranganathan, N.: Design of Efficient Reversible Binary Subtractors Based on a New Reversible Gate. In: IEEE Computer Society Annual Symposium on VLSI, pp. 229–234 (2009)
Bhagyalakshmi, H.R., Venkatesha, M.K.: An Improved Design of a Multiplier using Reversible Logic Gates. International J. Engineering Science and Technology, 3838–3845 (2010)
Zhou, R., et al.: Comment on Design of a Novel Reversible Multiplier Circuit using HNG Gate in Nanotechnology. World Applied Sciences Journal, 161–165 (2010)
Islam, M.S., et al.: Low Cost Quantum Realization of Reversible Multip-lier Circuit. Information Technology Journal 8, 208–213 (2009)
Author information
Authors and Affiliations
Corresponding author
Editor information
Editors and Affiliations
Rights and permissions
Copyright information
© 2013 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Rangaraju, H.G., Suresh, A.B., Muralidhara, K.N. (2013). Design of Efficient Reversible Multiplier. In: Meghanathan, N., Nagamalai, D., Chaki, N. (eds) Advances in Computing and Information Technology. Advances in Intelligent Systems and Computing, vol 178. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31600-5_56
Download citation
DOI: https://doi.org/10.1007/978-3-642-31600-5_56
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-31599-2
Online ISBN: 978-3-642-31600-5
eBook Packages: EngineeringEngineering (R0)