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Analog Performance Analysis of Dual-k Spacer Based Underlap FinFET

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Part of the Lecture Notes in Computer Science book series (LNTCS,volume 7373)

Abstract

In this paper we have analysed the analog performance of conventional as well as dual-k spacer based underlap FinFET. Dual-k spacer in underlap FinFET is used to improve the gate electrostatic integrity. The inner high-k spacer helps in better screening out of gate sidewall fringing fields, thereby, increasing transconductance and reducing output conductance with increase in total gate capacitance. We have observed that, as compared to conventional single spacer design, the gain of dual-k spacer based design can be doubled (≥ 6dB) without affecting cutoff frequency. More so, the doping gradient can be relaxed to 9nm/dec in case of dual-k spacer based underlap N/P-FinFET because of excellent control over short channel effects and improved analog performance.

Keywords

  • Short channel effect (SCE)
  • Dual-k spacer
  • Figures of Merit (FOM)
  • Electrostatic integrity (EI)
  • Intrinsic gain
  • Cutoff frequency

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© 2012 Springer-Verlag Berlin Heidelberg

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Nandi, A., Saxena, A.K., Dasgupta, S. (2012). Analog Performance Analysis of Dual-k Spacer Based Underlap FinFET. In: Rahaman, H., Chattopadhyay, S., Chattopadhyay, S. (eds) Progress in VLSI Design and Test. Lecture Notes in Computer Science, vol 7373. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-31494-0_6

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  • DOI: https://doi.org/10.1007/978-3-642-31494-0_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-31493-3

  • Online ISBN: 978-3-642-31494-0

  • eBook Packages: Computer ScienceComputer Science (R0)