The Geometry of Synthesis

How to Make Hardware Out of Software
  • Dan R. Ghica
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7342)

Abstract

High-level synthesis or “hardware compilation” is a behavioural synthesis method in which circuits are specified using conventional programming languages. Such languages are generally recognised as more accessible than hardware description languages, and it is expected that their use would significantly increase design productivity. The Geometry of Synthesis is a new hardware compilation technique which achieves this goal in a semantic-directed fashion, by noting that functional programming languages and diagrammatic descriptions of hardware share a common mathematical structure, and by using the game-semantic model of the programming language to reduce all computational effects to signal-like message passing. As a consequence, this technique has mature support for higher-order functions [1], local (assignable) state [2], concurrency [3] and (affine) recursion [4]. Moreover, the compiler can support features such as separate compilation, libraries and a foreign-function interface [5]. The programming language of GoS, Verity, is an “Algol-like” language [6] extended with concurrency features [7]. The interplay between the call-by-name function mechanism and local effects, an approach specific to Algol, is the key ingredient which makes it possible for a large class of programs in this language to have finitely representable semantic models which can be synthesised as stand-alone static circuits. The compiler is available as an open-source download.

Keywords

Programming Language Type Inference Hardware Description Language Note Theor Conventional Programming 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

References

  1. 1.
    Ghica, D.R., Smith, A.: Geometry of Synthesis III: resource management through type inference. In: Ball, T., Sagiv, M. (eds.) POPL, pp. 345–356. ACM (2011)Google Scholar
  2. 2.
    Ghica, D.R.: Geometry of Synthesis: a structured approach to VLSI design. In: Hofmann, M., Felleisen, M. (eds.) POPL, pp. 363–375. ACM (2007)Google Scholar
  3. 3.
    Ghica, D.R., Smith, A.: Geometry of Synthesis II: From games to delay-insensitive circuits. Electr. Notes Theor. Comput. Sci. 265, 301–324 (2010)CrossRefGoogle Scholar
  4. 4.
    Ghica, D.R., Smith, A., Singh, S.: Geometry of Synthesis IV: compiling affine recursion into static hardware. In: Chakravarty, M.M.T., Hu, Z., Danvy, O. (eds.) ICFP, pp. 221–233. ACM (2011)Google Scholar
  5. 5.
    Ghica, D.R.: Function interface models for hardware compilation. In: Singh, S., Jobstmann, B., Kishinevsky, M., Brandt, J. (eds.) MEMOCODE, pp. 131–142. IEEE (2011)Google Scholar
  6. 6.
    Reynolds, J.C.: The essence of Algol. In: O’Hearn, P.W., Tennent, R.D. (eds.) ALGOL-like Languages, vol. 1, pp. 67–88. Birkhauser Boston Inc., Cambridge (1997)CrossRefGoogle Scholar
  7. 7.
    Ghica, D.R., Murawski, A.S.: Angelic semantics of fine-grained concurrency. Ann. Pure Appl. Logic 151(2-3), 89–114 (2008)MathSciNetMATHCrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Dan R. Ghica
    • 1
  1. 1.University of BirminghamUK

Personalised recommendations