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Selection Method of Minimum Test Set at Circuit Board Based on Improved Node Matrix

  • Ying Liu
  • HaiLiang Ma
  • FangJun Zhou
Conference paper
Part of the Advances in Intelligent and Soft Computing book series (AINSC, volume 169)

Abstract

Graph theory is applied in this paper to optimization design of test point set in circuit board fault diagnosis. The optimal detection node set of a circuit board can be established by a improved node matrix. The improved node matrix can also regenerate topology network graph of a circuit, which reflects the relationship among every node and the working status of all components in the circuit.

Keywords

Circuit board fault diagnosis minimum test set 

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Copyright information

© Springer-Verlag GmbH Berlin Heidelberg 2012

Authors and Affiliations

  • Ying Liu
    • 1
  • HaiLiang Ma
    • 2
  • FangJun Zhou
    • 3
    • 4
  1. 1.College of Electric and Information EngineeringNaval University of EngineeringWuhanChina
  2. 2.The Equipment Research Institute of PLA’s Second ArtilleryBeijingChina
  3. 3.College of Naval Architecture & PowerNaval University of EngineeringWuhanChina
  4. 4.College of Naval Architecture & PowerNaval University of EngineeringLüshunChina

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