Abstract
Graph theory is applied in this paper to optimization design of test point set in circuit board fault diagnosis. The optimal detection node set of a circuit board can be established by a improved node matrix. The improved node matrix can also regenerate topology network graph of a circuit, which reflects the relationship among every node and the working status of all components in the circuit.
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© 2012 Springer-Verlag GmbH Berlin Heidelberg
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Liu, Y., Ma, H., Zhou, F. (2012). Selection Method of Minimum Test Set at Circuit Board Based on Improved Node Matrix. In: Jin, D., Lin, S. (eds) Advances in Computer Science and Information Engineering. Advances in Intelligent and Soft Computing, vol 169. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-30223-7_80
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DOI: https://doi.org/10.1007/978-3-642-30223-7_80
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-30222-0
Online ISBN: 978-3-642-30223-7
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