Performance Analysis of Gigabit Ethernet Standard for Various Physical Media Using Triple Speed Ethernet IP Core on FPGA
Gigabit Ethernet Standard provides 1 Gbps bandwidth and is backward compatible with 10 Mbps (Ethernet) and 100 Mbps (Fast Ethernet). It can also be installed with lower cost than other technologies having similar speed. The performance studies of Gigabit Ethernet is more complex than Ethernet or Fast Ethernet protocols. In this paper we have described the implementation of Gigabit Ethernet design on FPGA using Altera’s Triple Speed Ethernet IP Core. The performance analysis of Gigabit Ethernet Standard has been studied using various physical media. This analysis includes performance measurements with different number of frames and frame lengths.
KeywordsMAC Triple Speed Ethernet Gigabit Ethernet SFP
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- 1.Mohsenin, T.: Design and Evaluation of FPGA-Based Gigabit-Ethernet/PCI Network Interface Card Thesis, Rice University (2004)Google Scholar
- 2.Kachris, C., et al.: Design and performance evaluation of an adaptive FPGA for network applications. Microelectron. J. (2008), doi:10.1016/j.mejo. 2008.05.011Google Scholar
- 3.Frazier, H.: The 802.3z Gigabit Ethernet Standard. IEEE Network, 6–7 (May/June 1998)Google Scholar
- 4.Triple Speed Ethernet Data Path Reference Design AN-483-June 2009 ver. 1.1 Altera Corporation (2009)Google Scholar
- 5.Triple-Speed Ethernet MegaCore Function User Guide © December 2010 Altera Corporation Application Note 483 (2010)Google Scholar
- 6.Duan, M., Han, H.: Research and Implementation of Gigabit Ethernet Full Line Rate. In: Cross Strait Quad-Regional Radio Science and Wireless Technology Conference, pp. 736–738 (2011)Google Scholar
- 7.Wang, Y., Zhang, C., et al.: Implementation of Gigabit Ethernet Network based on SOPC. In: Asia Pacific Conference on Wearable Computing Systems, pp. 341–343 (2010)Google Scholar