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European Conference on Parallel Processing

Euro-Par 2011: Euro-Par 2011: Parallel Processing Workshops pp 335–344Cite as

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PACUE: Processor Allocator Considering User Experience

PACUE: Processor Allocator Considering User Experience

  • Tetsuro Horikawa30,
  • Michio Honda30,
  • Jin Nakazawa31,
  • Kazunori Takashio31 &
  • …
  • Hideyuki Tokuda31,32 
  • Conference paper
  • 1081 Accesses

Part of the Lecture Notes in Computer Science book series (LNTCS,volume 7156)

Abstract

GPU accelerated applications including GPGPU ones are commonly seen in modern PCs. If many applications compete on the same GPU, the performance will decrease significantly. Some applications have a large impact on user experience. Therefore, for such applications, we have to limit GPU utilization by the other applications. It might be straightforward to modify applications to switch compute device dynamically for intelligent resources allocation. Unfortunately, we cannot do so due to software distribution policy or the other reasons. In this paper, we propose PACUE, which allows the end system to allocate compute devices arbitrary to applications. In addition, PACUE guesses optimal compute device for each application according to user preference. We implemented the dynamic compute device redirector of PACUE including OpenCL API hooking and device camouflaging features. We also implemented the frame of the resource manager of PACUE. We demonstrate PACUE achieves dynamic compute device redirecting on one out of two real applications and on all of 20 sample codes.

Keywords

  • Resource management
  • OpenCL
  • binary compatibility
  • GPU
  • GPGPU
  • PC
  • user experience

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Author information

Authors and Affiliations

  1. Graduate School of Media and Governance, Keio University, Japan

    Tetsuro Horikawa & Michio Honda

  2. Faculty of Environment and Information Studies, Keio University, 5322, Endo, Fujisawa, Kanagawa, 252-8520, Japan

    Jin Nakazawa, Kazunori Takashio & Hideyuki Tokuda

  3. JST-CREST, Japan

    Hideyuki Tokuda

Authors
  1. Tetsuro Horikawa
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  2. Michio Honda
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  3. Jin Nakazawa
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  4. Kazunori Takashio
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  5. Hideyuki Tokuda
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Editor information

Editors and Affiliations

  1. Scilytics, Koellnerhofgasse 3/15A, 1010, Vienna, Austria

    Michael Alexander

  2. ICAR-CNR, Via P. Castellino, 111, 80131, Napoli, Italy

    Pasqua D’Ambra

  3. University of Amsterdam, 1090, Amsterdam, Netherlands

    Adam Belloum

  4. Innovative Computing Laboratory, The University of Tennessee, US

    George Bosilca

  5. Department of Experimental Medicine and Clinic, University Magna Græcia, 88100, Catanzaro, Italy

    Mario Cannataro

  6. Computer Science Department, University of Pisa, Italy

    Marco Danelutto

  7. Second University of Naples, Italy

    Beniamino Di Martino

  8. TUMünchen,, Boltzmannstr. 3, ,, 85748, Garching, Germany

    Michael Gerndt

  9. Equipe Runtime, INRIA Bordeaux Sud-Ouest, 33405, Talence Cedex, France

    Emmanuel Jeannot & Raymond Namyst & 

  10. Equipe HIEPACS, INRIA Bordeaux Sud-Ouest, 33405, Talence Cedex, France

    Jean Roman

  11. Computer Science and Mathematics Division, Oak Ridge National Laboratory, 37831-6164, Oak Ridge, TN, USA

    Stephen L. Scott

  12. Department of Scientific Computing, University of Vienna, Nordbergstr. 15/3C, 1090, Vienna, Austria

    Jesper Larsson Traff

  13. Computer Science and Mathematics Division, Oak Ridge National Laboratory, 37831, Oak Ridge, TN, USA

    Geoffroy Vallée

  14. Technische Universität München, Germany

    Josef Weidendorfer

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© 2012 Springer-Verlag Berlin Heidelberg

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Cite this paper

Horikawa, T., Honda, M., Nakazawa, J., Takashio, K., Tokuda, H. (2012). PACUE: Processor Allocator Considering User Experience. In: Alexander, M., et al. Euro-Par 2011: Parallel Processing Workshops. Euro-Par 2011. Lecture Notes in Computer Science, vol 7156. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-29740-3_38

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  • DOI: https://doi.org/10.1007/978-3-642-29740-3_38

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-29739-7

  • Online ISBN: 978-3-642-29740-3

  • eBook Packages: Computer ScienceComputer Science (R0)

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