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European Conference on Parallel Processing

Euro-Par 2011: Euro-Par 2011: Parallel Processing Workshops pp 249–259Cite as

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Thermal Management of a Many-Core Processor under Fine-Grained Parallelism

Thermal Management of a Many-Core Processor under Fine-Grained Parallelism

  • Fuat Keceli30,
  • Tali Moreshet31 &
  • Uzi Vishkin30 
  • Conference paper
  • 1341 Accesses

Part of the Lecture Notes in Computer Science book series (LNTCS,volume 7155)

Abstract

In this paper, we present the work in progress that studies the run-time impact of various DTM techniques on a proposed 1024-core XMT chip. XMT aims to improve single task performance using fine-grained parallelism. Via simulations, we show that relative to a general global scheme, speedups of up to 46% with a dedicated interconnection controller and 22% with distributed control of computing clusters are possible. Our findings lead to several high level insights that can impact the design of a broader family of shared memory many-core systems.

Keywords

  • Clock Frequency
  • Thermal Management
  • Memory Access Pattern
  • Shared Cache
  • Power Envelope

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Author information

Authors and Affiliations

  1. University of Maryland, College Park, MD, USA

    Fuat Keceli & Uzi Vishkin

  2. Swarthmore College, Swarthmore, PA, USA

    Tali Moreshet

Authors
  1. Fuat Keceli
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  2. Tali Moreshet
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  3. Uzi Vishkin
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Editor information

Editors and Affiliations

  1. Scilytics, Koellnerhofgasse 3/15A, 1010, Vienna, Austria

    Michael Alexander

  2. ICAR-CNR, Via P. Castellino, 111, 80131, Napoli, Italy

    Pasqua D’Ambra

  3. University of Amsterdam, 1090, Amsterdam, Netherlands

    Adam Belloum

  4. Innovative Computing Laboratory, The University of Tennessee, USA

    George Bosilca

  5. Department of Experimental Medicine and Clinic, University Magna Græcia, 88100, Catanzaro, Italy

    Mario Cannataro

  6. Computer Science Department, University of Pisa, Italy

    Marco Danelutto

  7. Second University of Naples, Italy

    Beniamino Di Martino

  8. TU München, Boltzmannstr. 3, 85748, Garching, Germany

    Michael Gerndt

  9. Equipe Runtime, INRIA Bordeaux Sud-Ouest, 33405, Talence Cedex, France

    Emmanuel Jeannot & Raymond Namyst & 

  10. Equipe HIEPACS, INRIA Bordeaux Sud-Ouest, 33405, Talence Cedex, France

    Jean Roman

  11. Oak Ridge National Laboratory, Computer Science and Mathematics Division, 37831-6164, Oak Ridge, TN, USA

    Stephen L. Scott

  12. Department of Scientific Computing, University of Vienna, Nordbergstr. 15/3C, 1090, Vienna, Austrial

    Jesper Larsson Traff

  13. Computer Science and Mathematics Division, Oak Ridge National Laboratory, 37831, Oak Ridge, TN, USA

    Geoffroy Vallée

  14. Technische Universität München, Germany

    Josef Weidendorfer

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© 2012 Springer-Verlag Berlin Heidelberg

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Keceli, F., Moreshet, T., Vishkin, U. (2012). Thermal Management of a Many-Core Processor under Fine-Grained Parallelism. In: Alexander, M., et al. Euro-Par 2011: Parallel Processing Workshops. Euro-Par 2011. Lecture Notes in Computer Science, vol 7155. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-29737-3_29

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  • DOI: https://doi.org/10.1007/978-3-642-29737-3_29

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  • Print ISBN: 978-3-642-29736-6

  • Online ISBN: 978-3-642-29737-3

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