Global Faults on Cryptographic Circuits

Chapter
Part of the Information Security and Cryptography book series (ISC)

Abstract

Methods of injecting faults in a laboratory are numerous and varied. We divide the state of the art in methods of injecting faults in electronic circuits into two categories. The first is global attacks, which disturb all the equipotentials of a netlist simultaneously. The second is local attacks, which target a more specific zone of the components’ surface, rear or front. Global attacks are a less accurate method of injecting faults but require a much lower budget. This chapter further discusses the specifics of global versus local faults. Then, it provides models for global faults and demonstrates that most theoretical fault attack constructions can be obtained in practice by means of global fault injection. To illustrate this, we provide an extensive characterization of fault models by emulation (FPGA) on application-specific devices (ASICs). Finally, this chapter ends with an exhaustive survey of the experimental means of injecting global faults and their effect as a critical path setup time violation phenomenon.

Keywords

Smart Card Fault Model Critical Path Block Cipher Data Path 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  1. 1.Institut TELECOM/TELECOM ParisTechParisFrance

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