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Interaction Between Fault Attack Countermeasures and the Resistance Against Power Analysis Attacks

  • Francesco Regazzoni
  • Luca Breveglieri
  • Paolo Ienne
  • Israel Koren
Chapter
Part of the Information Security and Cryptography book series (ISC)

Abstract

Most of the countermeasures against fault attacks on cryptographic systems that have been developed so far are based on the addition of information redundancy. While these countermeasures have been evaluated with respect to their cost (implementation overhead) and efficiency (fault coverage), little attention has been devoted to the question of the impact their use has on the effectiveness of other types of side-channel attacks, in particular, power analysis attacks. This chapter presents an experimental study whose goal is to determine whether the added information redundancy can increase the vulnerability of a cryptographic circuit to power analysis attacks.

Keywords

Error Detection Information Leakage Differential Power Analysis Power Trace Fault Attack 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Francesco Regazzoni
    • 2
    • 1
  • Luca Breveglieri
    • 3
  • Paolo Ienne
    • 4
  • Israel Koren
    • 5
  1. 1.Crypto Group, Université catholique de LouvainLouvain-la-NeuveBelgium
  2. 2.ALaRIUniversity of LuganoLuganoSwitzerland
  3. 3.Politecnico di Milano, Dipartimento di Elettronica de Informazione (DEI)MilanItaly
  4. 4.School of Computer and Communication Sciences, École Polytechnique Fédérale de Lausanne (EPFL)LausanneSwitzerland
  5. 5.University of MassachusettsAmherstUSA

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