Attacking the Dimensionality Problem of Parameterized Systems via Bounded Reachability Graphs
Parameterized systems are systems that involve numerous instantiations of finite-state processes, and depend on parameters which define their size. The verification of parameterized systems is to decide if a property holds in its every size instance, essentially a problem with an infinite state space, and thus poses a great challenge to the community. Starting with a set of undesired states represented by an upward-closed set, the backward reachability analysis will always terminate because of the well-quasi-orderingness. As a result, backward reachability analysis has been widely used in the verification of parameterized systems. However, many existing approaches are facing with the dimensionality problem, which describes the phenomenon that the memory used for storing the symbolic state space grows extremely fast when the number of states of the finite-state process increases, making the verification rather inefficient. Based on bounded backward reachability graphs, a novel abstraction for parameterized systems, we have developed an approach for building abstractions with incrementally increased dimensions and thus improving the precision until a property is proven or a counterexample is detected. The experiments show that the verification efficiencies have been significantly improved because conclusive results tend to be drawn on abstractions with much lower dimensions.
KeywordsParameterized System Model Check Dimensionality Problem User Process Reachability Analysis
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- 4.Emerson, E.A., Namjoshi, K.S.: On model checking for non-deterministic infinite-state systems. In: Logic in Computer Science, pp. 70–80 (1998)Google Scholar
- 5.Esparza, J., Finkel, A., Mayr, R.: On the verification of broadcast protocols. In: LICS 1999: Proceedings of the 14th Annual IEEE Symposium on Logic in Computer Science, p. 352. IEEE Computer Society, Washington, DC (1999)Google Scholar
- 13.Vardi, M.Y., Wolper, P.: An automata-theoretic approach to automatic program verification (preliminary report). In: Meyer, A. (ed.) Proceedings of the First Annual IEEE Symp. on Logic in Computer Science, LICS 1986, pp. 332–344. IEEE Computer Society Press (1986)Google Scholar
- 16.Dwyer, M.B., Person, S., Elbaum, S.G.: Controlling factors in evaluating path-sensitive error detection techniques. In: Young, M., Devanbu, P.T. (eds.) SIGSOFT FSE, pp. 92–104. ACM (2006)Google Scholar