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Introduction

  • Francisco Fernández de Vega
  • J. Ignacio Hidalgo
  • Juan Lanchares
Part of the Studies in Computational Intelligence book series (SCI, volume 415)

Abstract

For many years, computer performance improvement was based on technological innovations that allowed to dramatically increase the chip’s transistor count. Moreover, architectural progress aimed at organizing processors structure have allowed to overcome traditional sequential execution of programs by exploiting instruction level parallelism. Yet, last decade has shown that Moore’s Law is reaching its natural breaking point and maintaining the performance improvement rate by decreasing transistor’s size will no longer be possible. Main manufacturers have thus decided to offer more processor kernels in a single chip, opening the way to the multi core era. Examples of that are: the Intel core i3 (2 cores), i5 (4 cores), and i7 (4 cores) architectures, AMD Zambezi, phenom iii (8 cores), phenom ii (6 cores).

Keywords

Particle Swarm Optimization Graphic Processing Unit Parallel Architecture Multi Objective Evolutionary Algorithm Cartesian Genetic Program 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Berlin Heidelberg 2012

Authors and Affiliations

  • Francisco Fernández de Vega
    • 1
  • J. Ignacio Hidalgo
    • 2
  • Juan Lanchares
    • 2
  1. 1.Universidad de ExtremaduraMéridaSpain
  2. 2.Universidad Complutense de MadridMadridSpain

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