Advertisement

A Lightweight Technique for Distributed and Incremental Program Verification

  • Martin Brain
  • Florian Schanda
Part of the Lecture Notes in Computer Science book series (LNCS, volume 7152)

Abstract

Applying automated verification to industrial code bases creates a significant computational task even when the individual conditions to be checked are trivial. This affects the wall clock time taken to verify the program and has knock-on effects on how the tools are used and on project management. In this paper a simple and lightweight technique for adding incremental and distributed capabilities to a program verification system is given. Experiments with an implementation of the technique for the SPARK tool set show that it can yield an average 29 fold speed increase in incremental use and near optimal speedup in distributed use. Critically, this gives a qualitative change in how automated verification is used in a large commercial project.

Keywords

Model Check Wall Clock Time Java Modeling Language Time Band Interactive Theorem Prover 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Altran Praxis: SPARK Pro. (2009), http://www.adacore.com/home/products/sparkpro
  2. 2.
    Barnes, J.: High Integrity Software - The SPARK Approach to Saftey and Security, 2nd edn. Addison Wesley (2006)Google Scholar
  3. 3.
    Bergeretti, Carré.: Information-flow and data-flow analysis of while programs. ACM Transactions on Programming Languages and Systems 7, 37–61 (1985)CrossRefzbMATHGoogle Scholar
  4. 4.
    Bergeretti, J.F.: An algebraic approach to program analysis: Foundations of a practical analysis system. Ph.D. thesis, University of Southampton, Faculty of Engineering and Applied Science, Department of Electronics (1979)Google Scholar
  5. 5.
    Berghofer, S.: Verification of Dependable Software using SPARK and Isabelle. In: Brauer, J., Roveri, M., Tews, H. (eds.) Proceedings of the 6th International Workshop on Systems Software Verification (SSV 2011). pp. 48–65. TU Dresden (August 2011); technical report TUDIFI11Google Scholar
  6. 6.
    Bobot, F., Filliâtre, J.C., Marché, C., Paskevich, A.: Why3: Shepherd your herd of provers. In: Rustan, et al. [32], pp. 53–64Google Scholar
  7. 7.
    Brain, M., Schanda, F.: The Riposte counter example generator (2011), http://forge.open-do.org/projects/riposte
  8. 8.
    Cohen, E., Dahlweid, M., Hillebrand, M., Leinenbach, D., Moskal, M., Santen, T., Schulte, W., Tobies, S.: Vcc: A Practical System for Verifying Concurrent C. In: Berghofer, S., Nipkow, T., Urban, C., Wenzel, M. (eds.) TPHOLs 2009. LNCS, vol. 5674, pp. 23–42. Springer, Heidelberg (2009)CrossRefGoogle Scholar
  9. 9.
    Conchon, S., Contejean, E., Kanig, J.: Ergo: A theorem prover for polymorphic first-order logic modulo theories (2006), http://ergo.lri.fr/papers/ergo.ps
  10. 10.
    Conway, C.L., Namjoshi, K.S., Dams, D., Edwards, S.A.: Incremental Algorithms for Inter-Procedural Analysis of Safety Properties. In: Etessami, K., Rajamani, S.K. (eds.) CAV 2005. LNCS, vol. 3576, pp. 449–461. Springer, Heidelberg (2005)CrossRefGoogle Scholar
  11. 11.
    CVC3: An automatic theorem prover for Satisfiability Modulo Theories (SMT) (2006), http://www.cs.nyu.edu/acsys/cvc3
  12. 12.
    D’Silva, V., Kroening, D., Weissenbacher, G.: A survey of automated techniques for formal software verification. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 27(7), 1165–1178 (2008)CrossRefGoogle Scholar
  13. 13.
    Dutertre, B., de Moura, L.: The YICES SMT Solver (2006), http://yices.csl.sri.com/tool-paper.pdf
  14. 14.
    Eichberg, M., Kahl, M., Saha, D., Mezini, M., Ostermann, K.: Automatic Incrementalization of Prolog Based Static Analyses. In: Hanus, M. (ed.) PADL 2007. LNCS, vol. 4354, pp. 109–123. Springer, Heidelberg (2006)CrossRefGoogle Scholar
  15. 15.
    Filliâtre, J.C., Marché, C.: The Why/Krakatoa/Caduceus Platform for Deductive Program Verification. In: Damm, W., Hermanns, H. (eds.) CAV 2007. LNCS, vol. 4590, pp. 173–177. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  16. 16.
    Fitzpatrick, B., et al.: Memcached - a distributed memory object caching system (2003), http://memcached.org
  17. 17.
    Gelernter, D., Carriero, N., Chandran, S., Chang, S.: Parallel programming in Linda. In: ICPP, pp. 255–263 (1985)Google Scholar
  18. 18.
    Guitton, J., Kanig, J., Moy, Y.: Why hi-lite ada? In: Rustan, et al. [32], pp. 27–39Google Scholar
  19. 19.
    Hennessy, J.L., Patterson, D.: Computer Architecture, A Quantitative Approach, 4th edn. Morgan Kaufmann (2007)Google Scholar
  20. 20.
    Henzinger, T.A., Jhala, R., Majumdar, R., Sanvido, M.A.A.: Extreme Model Checking. In: Dershowitz, N. (ed.) Verification: Theory and Practice. LNCS, vol. 2772, pp. 332–358. Springer, Heidelberg (2004)CrossRefGoogle Scholar
  21. 21.
    Hovemeyer, D., Pugh, W.: Finding bugs is easy. SIGPLAN Not. 39, 92–106 (2004), http://doi.acm.org/10.1145/1052883.1052895 CrossRefGoogle Scholar
  22. 22.
    Jackson, P.B., Passmore, G.O.: Proving SPARK Verification Conditions with SMT solvers (December 2009), http://homepages.inf.ed.ac.uk/pbj/papers/vct-dec09-draft.pdf
  23. 23.
    James, P.R., Chalin, P.: Esc4: A modern caching ESC for Java. In: Huisman, M. (ed.) Proceedings of the 8th International Workshop on Specification and Verification of Component-Based Systems, pp. 19–26. Association for Computing Machinery (2009)Google Scholar
  24. 24.
    James, P.R., Chalin, P.: Faster and more complete extended static checking for the java modeling language. Journal of Automated Reasoning 44(1-2), 145–174 (2010)CrossRefzbMATHGoogle Scholar
  25. 25.
    Lahiri, S.K., Qadeer, S., Rakamarić, Z.: Static and Precise Detection of Concurrency Errors in Systems Code using SMT Solvers. In: Bouajjani, A., Maler, O. (eds.) CAV 2009. LNCS, vol. 5643, pp. 509–524. Springer, Heidelberg (2009)CrossRefGoogle Scholar
  26. 26.
    Leavens, G.T., Baker, A.L., Ruby, C.: Preliminary design of jml: a behavioral interface specification language for java. SIGSOFT Softw. Eng. Notes 31, 1–38 (2006), http://doi.acm.org/10.1145/1127878.1127884 CrossRefGoogle Scholar
  27. 27.
    Leino, K.: Dafny: An Automatic Program Verifier for Functional Correctness. In: Clarke, E.M., Voronkov, A. (eds.) LPAR-16 2010. LNCS, vol. 6355, pp. 348–370. Springer, Heidelberg (2010)CrossRefGoogle Scholar
  28. 28.
    Lopes, N.P., Rybalchenko, A.: Distributed and Predictable Software Model Checking. In: Jhala, R., Schmidt, D. (eds.) VMCAI 2011. LNCS, vol. 6538, pp. 340–355. Springer, Heidelberg (2011)CrossRefGoogle Scholar
  29. 29.
    de Moura, L., Bjørner, N.S.: Z3: An Efficient SMT Solver. In: Ramakrishnan, C.R., Rehof, J. (eds.) TACAS 2008. LNCS, vol. 4963, pp. 337–340. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  30. 30.
    Moy, Y.: Automatic Modular Static Safety Checking for C Programs. Ph.D. thesis, Université Paris-Sud (January 2009)Google Scholar
  31. 31.
    Ranise, S., Tinelli, C.: The SMT-LIB format: An initial proposal. In: Workshop on Pragmatics of Decision Procedures in Automated Reasoning (2003)Google Scholar
  32. 32.
    Rustan, K., Leino, M., Moskal, M. (eds.): First International Workshop on Intermediate Verification Languages (August 2011)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2012

Authors and Affiliations

  • Martin Brain
    • 1
    • 2
  • Florian Schanda
    • 2
  1. 1.Department of Computer ScienceUniversity of BathBathUK
  2. 2.Altran Praxis LimitedBathUK

Personalised recommendations