Configure Scheme of Mixed Computer Architecture for FMM Algorithm

  • Min Cao
  • Zhen Cao
Part of the Lecture Notes in Electrical Engineering book series (LNEE, volume 125)


Along with the scale expansion of high performance computing, accelerators are increasingly viewed as computer coprocessors that can provide significant computational performance at low price. Thus, research of mixed computer architecture is becoming popular. This paper presents a mixed configurable computer architecture which can run fast multipole method (FMM) algorithm of N-Body problem well. Each sub-procedure of FMM algorithm is implemented and tested on GPU, FPGA and CELL. FMM is optimized on the proposed configure scheme through decomposing its task flow. The probable solution for different task flow is also put forward. The conclusion is significant to the research on the mixed computer architecture of high performance computing.


Graphical Processing Unit Field Programmable Gate Array High Performance Computing Computer Architecture Multipole Expansion 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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Copyright information

© Springer-Verlag GmbH Berlin Heidelberg 2012

Authors and Affiliations

  1. 1.School of Computer Engineering & ScienceShanghai UniversityShanghaiChina

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