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Parallel Serpent under MorphoSys

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Part of the Lecture Notes in Electrical Engineering book series (LNEE,volume 127)

Abstract

The use of cryptographic algorithms within critical applications, such as banking and military, requires efficient hardware implementations. With the emergence of reconfigurable computing architectures, such modern and capable systems became the target of many applications including cryptography. This paper presents parallel reconfigurable hardware implementations of the Serpent (AES Finalist) cryptographic algorithm. Currently, Serpent is well known to be a simple but very strong encryption algorithm. The used system is the MorphoSys dynamically reconfigurable computer.Different designs for the Serpent corresponding to different degrees of parallelism are presented.Moreover, implementation, realization, and performance analysis and evaluation of the mapped designs are included. The Serpent algorithm is shown to have increased performance when mapped on MorphoSys.

Keywords

  • Hardware Implementation
  • Block Cipher
  • Advance Encryption Standard
  • Cryptographic Algorithm
  • Frame Buffer

These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Correspondence to Hassan Diab .

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Diab, H., Itani, M., Damaj, I., Kasbah, S. (2012). Parallel Serpent under MorphoSys . In: Qian, Z., Cao, L., Su, W., Wang, T., Yang, H. (eds) Recent Advances in Computer Science and Information Engineering. Lecture Notes in Electrical Engineering, vol 127. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-25769-8_107

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  • DOI: https://doi.org/10.1007/978-3-642-25769-8_107

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