NPGPU: Network Processing on Graphics Processing Units

  • Yangdong Deng
  • Xiaomemg Jiao
  • Shuai Mu
  • Kang Kang
  • Yuhao Zhu
Part of the Communications in Computer and Information Science book series (CCIS, volume 164)

Abstract

The Internet is still expanding despite its already unprecedented complexity. To meet the ever-increasing bandwidth requirements under fast appearing new services and applications, today’s Internet routers and other key network devices are challenged by two conflicting requirements, high performance and good programmability. In this work, we propose a series of data-parallel algorithms that can be efficiently implemented on modern graphics processing units (GPUs). Experimental results proved that the GPU could serve as an excellent packet processing platform by significantly outperforming CPU on typical router applications. On such a basis, we proposed a hybrid microarchitecture by integrating both CPU and GPU. Besides dramatically enhancing packet throughput, the integrated microarchitecture could also optimize quality-of-service metrics, which is also of key importance for network applications. Our work suggests that an integrated CPU/GPU architecture provides a promising solution for implementing future network processing hardware.

Keywords

GPU router table lookup packet classification meta-programming deep packet inspection Bloom filter DFA Software Router QoS 

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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Yangdong Deng
    • 1
  • Xiaomemg Jiao
    • 1
  • Shuai Mu
    • 1
  • Kang Kang
    • 1
  • Yuhao Zhu
    • 2
  1. 1.Institute of MicroelectronicsTsinghua UniversityBeijingChina
  2. 2.Electrical and Computer Engineering DepartmentUniversity of Texas at AustinAustinUSA

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