Performance Characteristics of Explicit Superpage Support

  • Mel Gorman
  • Patrick Healy
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6161)


Many modern processors support more than one page size. In the 1990s the larger pages, called superpages, were identified as one means of reducing the time spent servicing Translation Lookaside Buffer (TLB) misses by increasing TLB reach. Transparent usage of superpages has seen limited support due to architectural limitations, the cost of monitoring and implementing promotion/demotion, the uncertainity of whether superpages will be a performance boost and the decreasing cost of TLB misses due to hardware innovations. As significant modifications are required to transparently support superpages, the perception is that the cost of transparency will exceed the benefits for real workloads.

This paper describes how processes can explicitly request memory be backed by superpages that is cross-platform, incurs no measurable cost and is suitable for use in a general operating system. By not impacting base page performance, a baseline metric is established that alternative superpage implementations can compare against. A reservation scheme for superpages is used at mmap() time that guarantees faults without depending on pre-faulting, the fragmentation state of the system or demotion strategies. It is described how to back different regions of memory using explicit superpage support without application modification and present an evaluation of an implementation running a range of workloads.


File Region Java Virtual Machine Page Size Page Fault Address Translation 
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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Mel Gorman
    • 1
  • Patrick Healy
    • 2
  1. 1.IBM / University of LimerickIreland
  2. 2.University of LimerickIreland

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