Abstract
SRAM-based FPGAs are sensitive to radiation effects. Soft errors can appear and accumulate, potentially defeating mitigation strategies deployed at the Application Layer. Therefore, Configuration Memory scrubbing is required to improve radiation tolerance of such FPGAs in space applications. Virtex FPGAs allow runtime scrubbing by means of dynamic partial reconfiguration. Even with scrubbing, intra-FPGA TMR systems are subjected to common-mode errors affecting more than one design domain. This is solved in inter-FPGA TMR systems at the expense of a higher cost, power and mass. In this context, a self-reference scrubber for device-level TMR system based on Xilinx Virtex FPGAs is presented. This scrubber allows for a fast SEU/MBU detection and correction by peer frame comparison without needing to access a golden configuration memory.
Keywords
- SRAM-based
- FPGA
- EDAC
- SEU
- MBU
- SEFI
- TMR
- Scrubber
- Scrubbing
- Readback
- Reconfiguration
- Configuration Memory
- Reliability
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Herrera-Alzu, I., López-Vallejo, M. (2011). Self-reference Scrubber for TMR Systems Based on Xilinx Virtex FPGAs. In: Ayala, J.L., García-Cámara, B., Prieto, M., Ruggiero, M., Sicard, G. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization, and Simulation. PATMOS 2011. Lecture Notes in Computer Science, vol 6951. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-24154-3_14
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DOI: https://doi.org/10.1007/978-3-642-24154-3_14
Publisher Name: Springer, Berlin, Heidelberg
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