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Dynamic Reconfiguration in JPEG2000 Hardware Architecture

  • Ali Ahmadinia
  • Hernando Fernandez-Canque
  • Roberto Ramirez-Iniguez
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6883)

Abstract

Reconfigurable hardware components such as Field Programmable Gate Arrays (FPGAs) are used more and more in embedded systems, since such components offer a sufficient capacity for a complete System on a Chip (SoC) with a high degree of flexibility. In order to use efficiently the dynamic reconfiguration possibility on such components, there is a need to exploit this feature on complex real-world applications. This paper proposes a dynamically reconfigurable architecture for JPEG2000 application. The dynamic reconfiguration of JPEG2000 enables us to use hardware resources more efficiently which reduces power consumption and increases the frame rate of image compression.

Keywords

Frame Rate Discrete Wavelet Transform Field Programmable Gate Array Image Compression Fault Injection 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Ali Ahmadinia
    • 1
  • Hernando Fernandez-Canque
    • 1
  • Roberto Ramirez-Iniguez
    • 1
  1. 1.School of Engineering and ComputingGlasgow Caledonian UniversityScotland, UK

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