Fast and Robust Symbolic Model Order Reduction with Analog Insydes

  • Matthias Hauser
  • Christian Salzig
  • Alexander Dreyer
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 6885)


Nowadays analog circuits become more and more complex. The growing number of devices hinder to understand the full behavior of these and new methods are required to support the design. This paper presents two new methods for handling complex nonlinear analog circuits which are available in the new release Analog Insydes 2011, the Mathematica toolbox for symbolic modeling, analysis and reduction of analog circuits. The transient symbolic model order reduction allows the approximation of behavioral models keeping static and dynamic properties. The new solving algorithm for symbolic equation systems based on sequential equations accelerates the simulation of the reference system as well as the verification of the reduced models. Furthermore, it increases the robustness of the solver permitting analyzes of significantly larger symbolic systems. As example, a voltage controller circuit is reduced using the introduced methods.


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  1. [Ciccazzo08]
    Ciccazzo, A., Halfmann, T., Marotta, A., Rinaudo, S., Venturi, A.: Introduction of Symbolic Simplified Expressions in Circuit Optimization. In: Minisymposium: Optimization and Model Order Reduction in Circuit Design, The European Consortium For Mathematics In Industry (ECMI 2008), University College London, UK (2008)Google Scholar
  2. [Halfmann08]
    Halfmann, T., Broz, J., Knoth, C., Platte, D., Rotter, P.: Generation of efficient behavioral models using model compilation and model reduction techniques. In: Proc. Xth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SMACD 2008), Erfurt (2008)Google Scholar
  3. [Platte06]
    Platte, D., Sommer, R., Broz, J., Dreyer, A., Halfmann, T., Barke, E.: Automatische nichtlineare Verhaltensmodellgenerierung mit sequentieller Gleichungsstruktur. In: 9. ITG/GMM-Fachtagung Analog 2006: Entwicklung von Analogschaltungen mit CAE-Methoden (ANALOG 2006), Dresden (2006)Google Scholar
  4. [Platte08]
    Platte, D.: Simulation Efficiency of Analog Behavioral Models - Analyses and Improvements, Dissertation, Cuvillier Verlag Göttingen (July 2008)Google Scholar
  5. [Salzig10]
    Salzig, C., Hauser, M.: Design of robust electronic circuits for yield optimization. In: XIth International Workshop on Symbolic and Numerical Methods, Modeling and Applications to Circuit Design (SM2ACD 2010), Tunis-Gammarth, Tunesia (October 2010)Google Scholar
  6. [Web]
    Analog Insydes ”the INtelligent SYmbolic DEsign System for analog circuits”, the Mathematica toolbox for design, analysis and reduction of analog circuits,
  7. [Wichmann04]
    Wichmann, T.: ”Symbolische Reduktionsverfahren für nichtlineare DAE-Systeme”. PHD Fraunhofer ITWM, Kaiserslautern (2004)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2011

Authors and Affiliations

  • Matthias Hauser
    • 1
  • Christian Salzig
    • 1
  • Alexander Dreyer
    • 1
  1. 1.Fraunhofer Institute for Industrial Mathematics (ITWM)KaiserslauternGermany

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