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Impact of Architecture Selection on RF Front-End Power Consumption

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Part of the book series: Lecture Notes in Electrical Engineering ((LNEE,volume 104))

Abstract

A wireless receiver is typically composed by two sections: an analog front-end and a baseband digital processor. The analog section receives the modulated RF signal and downconvertes it to an appropriate intermediate frequency (IF) or directly to baseband (BB). The downconverted signal can be demodulated either in the analog domain or in the digital domain, after being digitized by an analog-to-digital (ADC) converter. The main issues related to this process are the following:

  • Frequency translation of the wanted channel filtering out the unwanted interferers

  • Lower noise contribution as possible in order not to degrade the signal’s SNR

  • The signal’s integrity must be guaranteed

  • Amplification of the signal’s power up to the optimum level for the Analogue to Digital Converter (ADC) maximum efficiency

The interference-free frequency downconversion process is carried out by a mixer complemented by precise out-of-band and in-band channel filters and image rejection filtering. On the other hand, the minimum noise contribution is critical in the first stages of the front end (Friis 1945); therefore a Low Noise Amplifier (LNA) is key to keep the overall noise as low as possible. Nevertheless, the subsequent blocks need also to fit to the overall specification. For maintaining the integrity of the signal, a robust performance against blockers and self-distortion is guaranteed by means of increasing the dynamic range and linearity of each building block of the receiver, especially those at the last stages of the receiving path (Razavi 1998). Finally, the amplifying requirement depends on the power level detected at the RF input (sensitivity) and on the ADC’s dynamic range: The analog (ready to be digitized) signal needs to go beyond the sensitivity level of the converter, but not further up to its saturation level.

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Alvarado, U., Bistué, G., Adín, I. (2011). Impact of Architecture Selection on RF Front-End Power Consumption. In: Low Power RF Circuit Design in Standard CMOS Technology. Lecture Notes in Electrical Engineering, vol 104. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-22987-9_3

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  • DOI: https://doi.org/10.1007/978-3-642-22987-9_3

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-22986-2

  • Online ISBN: 978-3-642-22987-9

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