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An Efficient Mapping Table Management in NAND Flash-Based Mobile Computers

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Book cover Computational Science and Its Applications - ICCSA 2011 (ICCSA 2011)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 6784))

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Abstract

Most mobile computers use NAND flash memory-based storage devices for storing data. In flash memory-based storage devices, flash translation layer is widely used to translate logical address from a file system to physical address of flash memory by using mapping tables. The legacy FTLs have a problem that they must maintain very large mapping tables in the RAM. In general, however, most mobile computers do not have sufficient RAM. In order to address these issues, we proposed a new mapping table management scheme which can be used in NAND flash-based mobile computers. We showed through the trace-driven simulations that the proposed scheme reduces the space overhead dramatically but does not increase the time overhead.

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References

  1. Samsung Electronics: K9GAG08U0M 2G * 8Bit NAND flash memory data sheet, http://www.samsungelectronics.com

  2. Wu, M., Zwaenepoel, W.: eNVy: A Non Volatile Main Memory Storage System. In: International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pp. 86–97 (1994)

    Google Scholar 

  3. Kawaguchi, A., Nishioka, S., Motoda, H.: A Flash Memory Based File System. In: Winter Technical Conference on USENIX, pp. 155–164 (1995)

    Google Scholar 

  4. Chang, L.-P., Kuo, T.-W.: An Adaptive Striping Architecture for Flash Memory Storage Systems of Embedded Systems. In: IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS), pp. 187–196 (2002)

    Google Scholar 

  5. Agrawal, N., Prabhakaran, V., Wobber, T., Davis, J., Manasse, M., Panigrahy, R.: Design Tradeoffs for SSD Performance. In: USENIX Conference (2008)

    Google Scholar 

  6. Leventhal, A.: Flash Storage Today. Queue 6(4) (2008)

    Google Scholar 

  7. Ban, A.: Flash file system. US Patent 5,404,485 (1995)

    Google Scholar 

  8. Gal, E., Toledo, S.: Algorithms and Data Structures for Flash Memories. ACM Computing Surveys 37(2) (2005)

    Google Scholar 

  9. Chung, T.-S., Park, D.-J., Park, S., Lee, D.-H., Lee, S.-W., Song, H.-J.: A Survey of Flash Translation Layer. Journal of Systems Architecture 55(5-6) (2009)

    Google Scholar 

  10. Kim, J., Kim, J., Noh, S., Min, S., Cho, Y.: A Space-efficient Flash Translation Layer for Compactflash Systems. IEEE Transactions on Consumer Electronics 48(2), 366–375 (2002)

    Article  Google Scholar 

  11. Lee, S., Park, D., Chung, T., Lee, D., Park, S., Song, H.: A Log Buffer-based Flash Translation Layer using Fully-associative Sector Translation. ACM Transaction on Embedded Computing Systems 6(3) (July 2007)

    Google Scholar 

  12. Park, C., Cheon, W., Kang, J., Roh, K., Cho, W., Kim, J.: A Reconfigurable FTL (Flash Translation Layer) Architecture for NAND Flash-based Applications. ACM Transaction on Embedded Computing Systems 7(4) ( July 2008)

    Google Scholar 

  13. Kang, J., Jo, H., Kim, J., Lee, J.: A Superblock-based Flash Translation for NAND Flash Memory. In: Proc. EMSOFT, pp. 161–170 (2006)

    Google Scholar 

  14. Lee, S., Shin, D., Kim, Y., Kim, J.: LAST: Locality-aware Sector Translation for NAND Flash Memory-based Storage Systems. SIGOPS Operating Systems Review 42(6), 36–42 (2008)

    Article  Google Scholar 

  15. Gupta, A., Kim, Y., Urgaonkar, B.: DFTL: A Flash Translation Layer Employing Demand-based Selective Caching of Page-level Address Mapping. In: International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS), pp. 229–240 (2009)

    Google Scholar 

  16. Hsieh, J., Tsai, Y., Kuo, T., Lee, T.: Configurable Flash Memory Management: Performance versus Overheads. IEEE Transactions on Computers 57(11), 1571–1583 (2008)

    Article  MathSciNet  Google Scholar 

  17. Ryu, Y.: SAT: Switchable Address Translation for Flash Mmemory Storages. In: Conference on IEEE Computer Software and Applications (COMPSAC) (July 2010)

    Google Scholar 

  18. http://iotta.snia.org/

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Author information

Authors and Affiliations

  1. Department of Computer Engineering, Myongji University, Nam-dong, Yongin, Gyeonggi-do, Korea

    Soo-Hyeon Yang & Yeonseung Ryu

Authors
  1. Soo-Hyeon Yang
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  2. Yeonseung Ryu
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Editor information

Editors and Affiliations

  1. L.I.S.U.T. - D.A.P.I.T., Basilicata University Potenza, 10, Viale dell’Ateneo Lucano, 85100, Potenza, Italy

    Beniamino Murgante

  2. Department of Mathematics and Computer Science, University of Perugia, Via Vanvitelli, 1, 06123, Perugia, Italy

    Osvaldo Gervasi

  3. Department of Applied Mathematics and Computational Sciences, University of Cantabria, Avda. de los Castros, s/n, C.P. 39005, Santander, Spain

    Andrés Iglesias

  4. School of Business Systems, Monash University, 3800, Clayton, VIC, Australia

    David Taniar

  5. Department of Intelligent Informatics, Kyushu Sangyo University, 2-3-1 Matsukadai, Higashi-ku, 813-8503, Fukuoka, Japan

    Bernady O. Apduhan

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© 2011 Springer-Verlag Berlin Heidelberg

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Yang, SH., Ryu, Y. (2011). An Efficient Mapping Table Management in NAND Flash-Based Mobile Computers. In: Murgante, B., Gervasi, O., Iglesias, A., Taniar, D., Apduhan, B.O. (eds) Computational Science and Its Applications - ICCSA 2011. ICCSA 2011. Lecture Notes in Computer Science, vol 6784. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-21931-3_40

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  • DOI: https://doi.org/10.1007/978-3-642-21931-3_40

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-21930-6

  • Online ISBN: 978-3-642-21931-3

  • eBook Packages: Computer ScienceComputer Science (R0)

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