Abstract
In this paper, the system’s verification testbench is established according to the functional requirements of a mixed-signal SoC system. The testbench tests the system processor’s control on the analog signal input circuit’s magnification and ADC’s sampling frequency. The simulation results with Modelsim indicate that the SoC System has achieved the expected functional requirements. And the testbench validates the accuracy of the SoC design well, reducing the risk of tape-out.
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© 2011 Springer-Verlag Berlin Heidelberg
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Wang, C., Lv, C., Li, Z. (2011). Testbench Design for a Mixed-Signal SoC. In: Lee, J. (eds) Advanced Electrical and Electronics Engineering. Lecture Notes in Electrical Engineering, vol 87. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-19712-3_42
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DOI: https://doi.org/10.1007/978-3-642-19712-3_42
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-19711-6
Online ISBN: 978-3-642-19712-3
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