Abstract
In this work we continue our investigation on the heating effects in nano-scale FD-SOI devices using an in-house thermal particle-based device simulator. We focus on the current variations for FD-SOI devices with arbitrary crystallographic orientation and examine which crystallographic orientation gives better results from electrical and thermal point of view. Our simulation results demonstrate that one can obtain the lowest current degradation with (110) wafer orientation. The temperature of the hot-spot is the smallest for (110)-orientation as well.
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Raleva, K., Vasileska, D., Goodnick, S.M. (2011). Modeling Thermal Effects in Fully-Depleted SOI Devices with Arbitrary Crystallographic Orientation. In: Dimov, I., Dimova, S., Kolkovska, N. (eds) Numerical Methods and Applications. NMA 2010. Lecture Notes in Computer Science, vol 6046. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-18466-6_11
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DOI: https://doi.org/10.1007/978-3-642-18466-6_11
Publisher Name: Springer, Berlin, Heidelberg
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