Skip to main content
SpringerLink
Log in

Open FPGA-Based Development Platform for Fuzzy Inference Systems

  • Chapter
Mining and Control of Network Traffic by Computational Intelligence

Part of the book series: Studies in Computational Intelligence ((SCI,volume 342))

  • 600 Accesses

Abstract

This chapter looks into the practical implementation of some of the fuzzy inference systems proposed in previous chapters. Both architectural and operational constraints are considered. The focus is on an open FPGA-based hardware platform for the implementation of efficient fuzzy inference systems for solving problems in high-performance packet switched networks. A feasibility study is conducted in order to show that the techniques developed can be deployed in current and future network scenarios with satisfactory performance.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 129.00
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 169.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info
Hardcover Book
USD 169.99
Price excludes VAT (USA)
  • Durable hardcover edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Abusaidi, P., Klein, M., Philofsky, B.: Virtex-5 FPGA system power design considerations. Tech. Rep. WP285 (v1.0), Xilinx Inc. (2008), http://www.xilinx.com/support/documentation/white_papers/wp285.pdf

  2. Appenzeller, G., Keslassy, I., McKeown, N.: Sizing Router Buffers. In: ACM Special Interest Group on Data Communications (SIGCOMM) Conference, Portland, OR, USA, pp. 281–292 (2004)

    Google Scholar 

  3. Ascia, G., Catania, V., Ficili, G., Palazzo, S., Panno, D.: A VLSI Fuzzy Expert System for Real-Time Traffic Control in ATM Networks. IEEE Transactions in Fuzzy Systems 5(1), 20–31 (1997)

    Article  Google Scholar 

  4. Ascia, G., Catania, V., Russo, M.: VLSI hardware architecture for complex fuzzy systems. IEEE Transactions in Fuzzy Systems 7(5), 553–570 (1999)

    Article  Google Scholar 

  5. Aweya, J.: IP router architectures: an overview. International Journal of Communication Systems 14(5), 447–475 (2001)

    Article  MATH  Google Scholar 

  6. Barriga, A., Sánchez-Solano, S., Brox, P., Cabrera, A., Baturone, I.: Modelling and implementation of fuzzy systems based on VHDL. International Journal of Approximate Reasoning 41(2), 164–178 (2006)

    Article  Google Scholar 

  7. Baturone, I., Sanchez-Solano, S.: Microelectronic Design of Universal Fuzzy Controllers. In: X Congreso Español sobre Tecnologías y Lógica Fuzzy (ESTYLF 2000), pp. 247–252 (2000)

    Google Scholar 

  8. Baturone, I., Sánchez-Solano, S., Barriga, A., Huertas, J.L.: Implementation of CMOS Fuzzy Controllers as Mixed-Signal Integrated Circuits. IEEE Transactions on Fuzzy Systems 5(1), 1–19 (1998)

    Article  Google Scholar 

  9. Baturone, I., Barriga, A., Sanchez-Solano, S., Jimenez, C.J., Lopez, D.R.: Microelectronic Design of Fuzzy Logic-Based Systems. CRC Press, Boca Raton (2000) ISBN: 0-8493-0091-6

    Google Scholar 

  10. Blake, S., Black, D.L., Carlson, M.A., Davies, E., Wang, Z., Weiss, W.: An Architecture for Differentiated Services. RFC 2475, Internet Engineering Task Force, Network Working Group, category: Informational (1998)

    Google Scholar 

  11. Cabrera, A., Sánchez-Solano, S., Senhadji, R., Barriga, A., Jimenez, C.J.: Hardware/Software Codesign Methodology for Fuzzy Controller Implementation. In: 11th IEEE International Conference on Fuzzy Systems (FUZZ-IEEE 2002), pp. 464–469 (2002)

    Google Scholar 

  12. Cabrera, A., Sánchez-Solano, S., Brox, P., Barriga, A., Senhadji, R.: Hardware/ Software Codesign of Configurable Fuzzy Control Systems. Applied Soft Computing 4(3), 271–285 (2004)

    Article  Google Scholar 

  13. Calyam, P., Krymskiy, D., Sridharan, M., Schopis, P.: Active and Passive Measurements on Campus, Regional and National Network Backbone Paths. In: 14th IEEE International Conference on Computer Communications and Networks (ICCCN 2005), San Diego, California, USA, pp. 537–542 (2005)

    Google Scholar 

  14. Cao, Q., Lim, M.H., Li, J.H., Ong, Y.S., Ng, W.L.: A context switchable fuzzy inference chip. IEEE Transactions on Fuzzy Systems 14(4), 552–567 (2006)

    Article  Google Scholar 

  15. Chao, H.J., Liu, B.: High Performance Switches and Routers. Wiley-IEEE Press (2007) ISBN: 978-0470053676

    Google Scholar 

  16. Chi J, et al.: WISHBONE Conbus IP Core (2008), http://www.opencores.org/projects.cgi/web/wb_conbus/

  17. CISCO CRS-1, Cisco CRS-1 Distributed Route Processor Datasheet. Cisco Systems, Inc. (2008), http://www.cisco.com/en/US/prod/collateral/routers/ps5763/product_data_sheet0900aecd80501c66.html

  18. Cisco Systems, Inc., The Evolution of High-End Router Architectures. Tech. rep., Basic Scalability and Performance Considerations for Evaluating Large-Scale Router Designs (2001), http://www.cisco.com/en/US/products/hw/routers/ps167/

  19. Cisco Systems, Inc., Portable product sheet: Router switching performance in packets per second (pps). Tech. rep., Cisco Systems (2006), http://www.cisco.com/web/partners/downloads/765/tools/quickreference/routerperformance.pdf

  20. Comer, D.E.: Network Systems Design Using Network Processors. Prentice-Hall, Upper Saddle River (2003) ISBN: 0-13-141792-4

    Google Scholar 

  21. Comer, D.E.: Network Processors: Programmable Technology for Building Network Systems. The Internet Protocol Journal 7(4), 3–12 (2004)

    Google Scholar 

  22. Comer, D.E.: Network Systems Design Using Network Processors: Intel 2XXX Version. Pearson Prentice Hall, Upper Saddle River (2005) ISBN: 9780131872868

    Google Scholar 

  23. Crowley, P., Franklin, M.A., Hadimioglu, H., Onufryk, P.Z. (eds.): Network Processor Design: Issues and Practices, Computer Architecture and Design, vol. 1. Morgan Kaufmann Publishers, San Francisco (2002) ISBN: 978-1558608757

    Google Scholar 

  24. Crowley, P., Franklin, M.A., Hadimioglu, H., Onufryk, P.Z. (eds.): Network Processor Design: Issues and Practices, Computer Architecture and Design, vol. 2. Morgan Kaufmann Publishers, San Francisco (2003) ISBN: 978-0121981570

    Google Scholar 

  25. Crowley, P., Franklin, M.A., Hadimioglu, H., Onufryk, P.Z. (eds.): Network Processor Design: Issues and Practices, Computer Architecture and Design, vol. 3. Morgan Kaufmann Publishers, San Francisco (2005) ISBN: 978-0120884766

    Google Scholar 

  26. Di Fatta, G., Hoffmann, F., Re, G.L., Urso, A.: A Genetic Algorithm for the Design of a Fuzzy Controller for Active Queue Management. IEEE Transactions on Systems, Man and Cybernetics, Part C: Applications and Reviews 33(3), 313–334 (2003)

    Article  Google Scholar 

  27. Dolenc, M., Markovic, T.: PCI IP Core Specification. Tech. Rep. Rev. 1.2, OpenCores.Org Free Open Source IP Cores and Chip Design (2004)

    Google Scholar 

  28. Dualibe, C., Verleysen, M., Jespers, P.G.: Design of Analog Fuzzy Logic Controllers in CMOS Technologies. Kluwer Academic Publishers, Dordrecht (2003) ISBN: 1-4020-7359-3

    Google Scholar 

  29. Endace Limited, DAG Network Monitoring Cards (2008), http://www.endace.com/our-products/dag-network-monitoring-cards/

  30. Flannagan, M., Froom, R., Turek, K.: Cisco Catalyst Qos. Quality of Service in Campus Networks. Cisco Systems, Inc. (2003) ISBN: 1-58705-120-6

    Google Scholar 

  31. Floyd, S., Kohler, E.: Internet Research Needs Better Models. ACM SIGCOMM Computer Communication Review 33(1), 29–34 (2003)

    Article  Google Scholar 

  32. Gardner, E., et al.: T1600© Internet Routing Node Hardware Guide, 2nd edn. Juniper Networks, Inc. (2008), http://www.juniper.net/techpubs/hardware/t-series.html

  33. Ghosh, S., Razouqi, Q., Schumacher, H.J., Celmins, A.: A Survey of Recent Advances in Fuzzy Logic in Telecommunications Networks and New Challenges. IEEE Transactions on Fuzzy Systems 6(39), 443–447 (1998)

    Article  Google Scholar 

  34. Goralski, W.J.: Juniper and Cisco Routing. Policy and Protocols for Multivendor IP Networks. Wiley Publishing Inc., Indianapolis (2002) ISBN: 0-471-21592-9

    Google Scholar 

  35. Grosse, E., Lakshman, Y.N.: Network Processors Applied to IPv4/IPv6 Transition. IEEE Network 17(4), 35–39 (2003)

    Article  Google Scholar 

  36. Herveille, R., et al.: WISHBONE System-on-Chip (SoC) Interconnection Arhitecture for Portable IP Cores. Tech. Rep. Revision B.3, OpenCores Organization (2002)

    Google Scholar 

  37. Heyde, A.A.: Investigating the performance of Endace DAG monitoring hardware and Intel NICs in the context of Lawful Interception. Tech. Rep. 080222A, Centre for Advanced Internet Architectures (CAIA), Swinburne University of Technology (2008), http://caia.swin.edu.au/reports/

  38. Hidell, M.: Decentralized Modular Router Architectures. PhD thesis, KTH-Royal Institute of Technology (2006)

    Google Scholar 

  39. Hidell, M., Sjödin, P., Hagsand, O.: Control and Forwarding Plane Interaction in Distributed Routers. Tech. Rep. TRITA-S3-LCN-0501, Laboratory for Communication Networks, Department of Signals, Sensors, and Systems. KTH Royal Institute of Technology, Stockholm, Sweden (2005)

    Google Scholar 

  40. IBM:SA-14-2528-02 On-Chip Peripheral Bus: Architecture Specifications. Version 2.1. International Business Machines Corporation (2001)

    Google Scholar 

  41. Information Sciences Institute University of Southern California, Viterbi School of Engineering, The Network Simulator – ns-2 (2008), http://www.isi.edu/nsnam/ns/

  42. Intel Corporation, Intel IXP12XX Product Line of Network Processors. Tech. rep., Intel Corporation (2008a), http://www.intel.com/design/network/products/npfamily/ixp1200.htm

  43. Intel Corporation, Intel XScale Technology (2008b), http://www.intel.com/design/intelxscale/

  44. Internet Engineering Task Force, Transport Area Forwarding and Control Element Separation (ForCES) Working Group. Internet Engineering Task Force, Transport Area (2008), http://www.ietf.org/html.charters/forces-charter.html

  45. Iyer, S., McKeown, N.: Analysis of the Parallel Packet Switch Architecture. IEEE/ACM Transactions on Networking 11(2) (2003)

    Google Scholar 

  46. Kandel, A., Langholz, G.: Fuzzy Hardware, Architectures and Applications. Kluwer Academic Publishers, Norwell (1997)

    MATH  Google Scholar 

  47. Keshav, S., Sharma, R.: Issues and trends in router design. IEEE Communications Magazine 36(5), 144–151 (1998)

    Article  Google Scholar 

  48. Kloth, A.K.: Advanced Router Architectures. CRC Press, Boca Raton (2005) ISBN: 0849335507

    Book  Google Scholar 

  49. Lago, E., Jiménez, C., Lopez, D., Sánchez-Solano, S., Barriga, A.: XFVHDL: A Tool for the Synthesis of Fuzzy Logic Controllers. In: Design Automation and Test in Europe (DATE 2008), Paris, France, pp. 102–107 (1998)

    Google Scholar 

  50. Lekkas, P.A.: Network Processors: Architectures, Protocols and Platforms, 1st edn. McGraw-Hill Professional, New York (2003) ISBN: 978-0071409865

    Google Scholar 

  51. Lhotka, L., Novotný, J., et al.: Description of COMBO cards (2008), http://www.liberouter.org/hardware.php

  52. Liang, Q., Karnik, N., Mendel, J.M.: Connection Admission Control in ATM Networks Using Survey-Based Type-2 Fuzzy Logic Systems. IEEE Transactions on Systems, Man and Cybernetics Part C: Applications and Reviews 30(3), 329–339 (2000)

    Article  Google Scholar 

  53. Manzoul, M.A., Jayabharathi, D.: FPGA for fuzzy controllers. IEEE Transactions on Systems, Man and Cybernetics 15(1), 213–216 (1995)

    Article  Google Scholar 

  54. McKeown, N.: Growth in Router Capacity. In: IPAM Workshop on Large-Scale Communication Networks, Lake Arrowhead, CA, USA (2003), http://tiny-tera.stanford.edu/~nickm/talks/index.html

  55. Montesino-Pouzols, F., Barriga, A., Lopez, D.R., Sánchez-Solano, S.: FPGA Based Implementation of Fuzzy Controllers for Internet Traffic. In: XII IBERCHIP Workshop, San José, Costa Rica, pp. 34–41 (2006)

    Google Scholar 

  56. Montesino-Pouzols, F., Lopez, D.R., Barriga, A., Sánchez-Solano, S.: Fuzzy End-to-End Rate Control for Internet Transport Protocols. In: 15th IEEE International Conference on Fuzzy Systems (FUZZ-IEEE 2006), Vancouver, Canada, pp. 1347–1354 (2006)

    Google Scholar 

  57. Montesino-Pouzols, F., Barriga, A., Lopez, D.R., Sánchez-Solano, S.: Open FPGA-Based Development Platform for Fuzzy Systems with Applications to Communications. In: XXII Conference on Design of Circuits and Integrated Systems (DCIS 2007), Seville, Spain, pp. 323–328 (2007)

    Google Scholar 

  58. Montesino-Pouzols, F., Barriga, A., Lopez, D.R., Sánchez-Solano, S.: Linguistic Summarization of Network Traffic Flows. In: 17th IEEE International Conference on Fuzzy Systems (FUZZ-IEEE 2008), IEEE World Congress on Computational Intelligence, Hong Kong, China, pp. 619–624 (2008)

    Google Scholar 

  59. Moreno-Velo, F., Sánchez-Solano, S., Barriga, A., Baturone, I., López, D.: XFL3: a New Fuzzy System Specification Language. In: 5th WSEAS/IEEE Multiconference on Circuits, Systems, Communications and Computers (CSCC 2001), Rethymon, pp. 361–366 (2001)

    Google Scholar 

  60. Moreno-Velo, F.J.: Un entorno de desarrollo para sistemas de inferencia complejos basados en lógica difusa. PhD thesis, University of Seville (2003)

    Google Scholar 

  61. Moreno-Velo, F.J., Baturone, I., Sánchez-Solano, S., Barriga, A.: Rapid Design of Fuzzy Systems With Xfuzzy. In: 12th IEEE International Conference on Fuzzy Systems (FUZZ-IEEE 2003), St. Louis, MO, USA, pp. 342–347 (2003)

    Google Scholar 

  62. Moreno-Velo, F.J., Baturone, I., Barriga, A., Sánchez-Solano, S.: Automatic Tuning of Complex Fuzzy Systems with Xfuzzy. Fuzzy Sets and Systems 158(18), 2026–2038 (2007)

    Article  MATH  MathSciNet  Google Scholar 

  63. de Oliveira, R., Braun, T.: A Delay-based Approach Using Fuzzy Logic to Improve TCP Error Detection in Ad Hoc Networks. In: IEEE Wireless Communications and Networking Conference, Atlanta, USA (2004)

    Google Scholar 

  64. OpenCores Organization, OpenCores.Org: Free Open Source IP Cores and Chip Design (2007), http://www.opencores.org

  65. Park, K., Willinger, W. (eds.): Self-Similar Network Traffic and Performance Evaluation. Wiley Interscience, New York (2000) ISBN: 0-471-31974-0

    Google Scholar 

  66. Resende, R.A., Nassif, N.A., de Siquira, M.A., da Silva, A.E., Lima-Marques, M.: Quality of Service Control in IP Networks Using Fuzzy Logic for Policy Condition Evaluation. In: IEEE International Conference on Fuzzy Systems (FUZZ-IEEE 2005), Reno, USA, pp. 448–453 (2005)

    Google Scholar 

  67. Rolls, D., Michailidis, G., Hernández-Campos, F.: Queueing Analysis of Network Traffic: Methodology and Visualization Tools. Computer Networks 48(3), 447–473 (2005)

    Article  Google Scholar 

  68. Sánchez-Solano, S., Barriga, A., Jiménez, C.J., Huertas, J.L.: Design and application of digital fuzzy controllers. In: Sixth IEEE International Conference on Fuzzy Systems (FUZZ-IEEE), vol. 2, pp. 869–874 (1997)

    Google Scholar 

  69. Semeria, C.: T-series routing platforms: System and packet forwarding architecture. Tech. Rep. 200027-001, Juniper Networks, Inc (2002), http://www.arl.wustl.edu/~jst/cse/577/readings/juniperTseries.pdf

  70. Stringfield, N., White, R., McKee, S.: Cisco Express Forwarding, 1st edn. Networking Technology. Cisco Press (2007) ISBN: 978-1-58705-236-1

    Google Scholar 

  71. Usselmann, R., et al.: WISHBONE/OPB & OPB/WISHBONE Interface Wrapper: Overview (2004), http://www.opencores.org/projects.cgi/web/opb_wb_wrapper

  72. Varghese, G.: Network Algorithmics: An Interdisciplinary Approach to Designing Fast Networked Devices. Morgan Kaufmann, San Francisco (2004) ISBN: 978-0120884773

    Google Scholar 

  73. Waldwagel, M., Varghese, G., Turner, J., Plattner, B.: Scalable High Speed Prefix Matching. ACM Transactions on Computer Systems 19(4), 440–482 (2001)

    Article  Google Scholar 

  74. Wang, J., Wei, D.X., Low, S.H.: Modelling and Stability of FAST TCP. In: 24th Annual Joint Conference of the IEEE Computer and Communications Societies (INFOCOM), Miami, FL, USA, pp. 938–948 (2005)

    Google Scholar 

  75. Xililnx Synthesis, Synthesis and Simulation Design Guide 9.2i. Xilinx© (2007), http://toolbox.xilinx.com/docsan/xilinx92/books/docs/sim/sim.pdf

  76. Xilinx ISE, Xilinx ISE 9.2i Software Manuals and Help - PDF Collection. Xilinx© (2007), http://www.xilinx.com/support/sw_manuals/xilinx92/index.htm

  77. Yaghmaee, M.H.: Design and Performance Evaluation of a Fuzzy Based Traffic Conditioner for Differentiated Services. Computer Networks 47(6), 847–869 (2005)

    Article  MATH  Google Scholar 

  78. Yusuf, S., Luk, W., Sloman, M., Dulay, N., Lupu, E.C., Brown, G.: Reconfigurable Architecture for Network Flow Analysis. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16(2), 57–65 (2008)

    Article  Google Scholar 

  79. Zhang, R., Phillis, Y.A., Ma, J.: A Fuzzy Approach to the Balance of Drop and Delay Priorities in Differentiated Services Networks. IEEE Transactions on Fuzzy Systems 11(6), 840–846 (2003)

    Article  Google Scholar 

  80. Zhang, R., Phillis, Y.A., Kouikoglou, V.: Fuzzy Systems for Queuing Control. Springer, London (2005) ISBN: 978-1-85233-824-4

    Google Scholar 

Download references

Authors
  1. Federico Montesino Pouzols
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Diego R. Lopez
    View author publications

    You can also search for this author in PubMed Google Scholar

  3. Angel Barriga Barros
    View author publications

    You can also search for this author in PubMed Google Scholar

Rights and permissions

Reprints and permissions

Copyright information

© 2011 Springer-Verlag Berlin Heidelberg

About this chapter

Cite this chapter

Pouzols, F.M., Lopez, D.R., Barros, A.B. (2011). Open FPGA-Based Development Platform for Fuzzy Inference Systems. In: Mining and Control of Network Traffic by Computational Intelligence. Studies in Computational Intelligence, vol 342. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-18084-2_6

Download citation

  • DOI: https://doi.org/10.1007/978-3-642-18084-2_6

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-642-18083-5

  • Online ISBN: 978-3-642-18084-2

  • eBook Packages: EngineeringEngineering (R0)

Publish with us

Policies and ethics

Search

Navigation