Abstract
Hand-handled, wireless world represents the most challenging environment for package technology where all the system performances must be densely stacked. Chip scale package (CSP) is the generic term for packages approaching chip size, and the fine-pitch versions of BGA have become the most widely used kind of CSP for system miniaturization. With the introduction of the new feature, where heterogeneous semiconductor devices are stacked together within a single package working at extremely high frequencies, the package design in terms of system simulation – mechanical, electrical, and thermal – is becoming one of most important development activities for delivering robust system solutions. In this chapter, the package historical trends against the system evolution will be discussed, analyzing the principal integration challenging. Among them, this chapter will focus on thin die thickness trend, taking into account the new process technology and the related impact on the device characteristics. This is considered as one of the most important back-end technologies, enabling the new era of the package integration and miniaturization. New interconnection technologies among dies will also be reviewed and discussed by deeply analyzing the features of through silicon via process. This process will allow the new interconnection scheme for microelectronics for the next decade.
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Losavio, A., Codegoni, D., Polignano, M.L., Zanderigo, F., Zanotti, L. (2011). Packaging Trends and Technology in Wireless and SSD Applications. In: Campardo, G., Tiziani, F., Iaculo, M. (eds) Memory Mass Storage. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-14752-4_6
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