Abstract
This paper discusses the performance of the latest vector-parallel supercomputer system SX-9. First, we report HPC challenge benchmark results of the SX-9 system, in which it achieves 19 top one scores in the 28 tests. In addition, we also discuss some tuning techniques for SX-9. We present case study analysis, in which the effects of code tuning for ADB, a newly introduced, software-controllable on chip cache of SX-9, on the sustained performance is examined by using science and engineering applications. Finally, we present our on-going research work on design of a multi-vector core processor toward the next generation vector computing. Through the experimental results, we confirm that vector caching plays an important role to extract the potential of the multi-vector core processor.
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Kobayashi, H. et al. (2010). Lessons Learned from 1-Year Experience with SX-9 and Toward the Next Generation Vector Computing. In: Resch, M., Roller, S., Benkert, K., Galle, M., Bez, W., Kobayashi, H. (eds) High Performance Computing on Vector Systems 2009. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-03913-3_1
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DOI: https://doi.org/10.1007/978-3-642-03913-3_1
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Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-642-03912-6
Online ISBN: 978-3-642-03913-3
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