A Seamless Virtualization Approach for Transparent Dynamical Function Mapping Targeting Heterogeneous and Reconfigurable Systems

  • Rainer Buchty
  • David Kramer
  • Fabian Nowak
  • Wolfgang Karl
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5453)


Future systems are not only heading towards increased parallelism, but also embrace heterogeneity and reconfigurability. We therefore present an approach targeting comfortable program development and execution, enabling full exploitation of the underlying hardware without burdening the application programmer with the details of the underlying hardware infrastructure. The approach employs lightweight resource virtualization by means of on-demand function resolution. By carefully extending the existing system infrastructure, the approach comes at virtually no cost and with highest compatibility to existing legacy code. The approach is suitable for a wide range of architectures from embedded systems to high-performance computing platforms.


Architecture Initiative Runtime System Application Execution Virtualization Layer Application Accelerator 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.


  1. 1.
    Advanced Micro Devices. AMD Fusion Whitepaper,
  2. 2.
    Buchty, R., Kramer, D., Kicherer, M., Karl, W.: A Light-weight Approach to Dynamical Runtime Linking Supporting Heterogenous, Parallel, and Reconfigurable Architectures. In: The 2009 International Conference on Architecture of Computing Systems (ARCS 2008), Delft, The Netherlands (to appear) (March 2009)Google Scholar
  3. 3.
    Socek, D.: 3DES/DES VHDL Core (2006),
  4. 4.
    De Bosschere, K., Luk, W., Martorell, X., Navarro, N., O’Boyle, M., Pnevmatikatos, D., Ramírez, A., Sainrat, P., Seznec, A., Stenström, P., Temam, O.: High-Performance Embedded Architecture and Compilation Roadmap. In: Stenström, P. (ed.) Transactions on High-Performance Embedded Architectures and Compilers I. LNCS, vol. 4050, pp. 5–29. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  5. 5.
    Ralf, S.: Engelschall and The OpenSSL Project. OpenSSL: The Open Source toolkit for SSL/TLS,
  6. 6.
    Held, J., Bautista, J., Koehl, S.: From a Few Cores to Many: A Tera-scale Computing Research Overview. Research at Intel Whitepaper (2006),
  7. 7.
    Fröning, H., Nüssle, M., Slogsnat, D., Litz, H., Brüning, U.: HTX Board: A Rapid Prototyping Station. In: 3rd annual FPGAworld Conference (November 2006),
  8. 8.
    HyperTransport Consortium. HyperTransport: Low latency Chip-to-Chip and beyond Interconnect (2008),
  9. 9.
    Cray Inc. Cray XD1 Supercomputer (2004),
  10. 10.
    Linderman, M.D., Collins, J.D., Wang, H., Meng, T.H.: Merge: a programming model for heterogeneous multi-core systems. In: ASPLOS XIII: Proceedings of the 13th international conference on Architectural support for programming languages and operating systems, pp. 287–296. ACM, New York (2008)CrossRefGoogle Scholar
  11. 11.
    RapidMind, Inc. RapidMind Multi-Core Development Platform (2008),
  12. 12.
    Vassiliadis, S., Wong, S., Cotofana, S.D.: The MOLEN μ-coded Processor. In: Brebner, G., Woods, R. (eds.) FPL 2001. LNCS, vol. 2147, pp. 275–285. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  13. 13.
    Huang, S., Hormati, A., Bacon, D., Rabbah, R.: Liquid Metal: Object-Oriented Programming Across the Hardware/Software Boundary. In: Vitek, J. (ed.) ECOOP 2008. LNCS, vol. 5142, pp. 76–103. Springer, Heidelberg (2008)CrossRefGoogle Scholar
  14. 14.
    The Santa Cruz Operation, Inc. System V Application Binary Interface, Edition 4.1 (1997),
  15. 15.
    Wang, P.H., Collins, J.D., Chinya, G.N., Jiang, H., Tian, X., Girkar, M., Yang, N.Y., Lueh, G.-Y., Wang, H.: EXOCHI: architecture and programming environment for a heterogeneous multi-core multithreaded system. SIGPLAN Not. 42(6), 156–166 (2007)CrossRefGoogle Scholar
  16. 16.
    NoTA World. NoTA – Open Architecture Initiative (2008),

Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Rainer Buchty
    • 1
  • David Kramer
    • 1
  • Fabian Nowak
    • 1
  • Wolfgang Karl
    • 1
  1. 1.Institut für Technische Informatik, Lehrstuhl für RechnerarchitekturUniversität Karlsruhe (TH)KarlsruheGermany

Personalised recommendations