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Compiling Techniques for Coarse Grained Runtime Reconfigurable Architectures

  • Mythri Alle
  • Keshavan Varadarajan
  • Alexander Fell
  • S. K. Nandy
  • Ranjani Narayan
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5453)

Abstract

In this paper we develop compilation techniques for the realization of applications described in a High Level Language (HLL) onto a Runtime Reconfigurable Architecture. The compiler determines Hyper Operations (HyperOps) that are subgraphs of a data flow graph (of an application) and comprise elementary operations that have strong producer-consumer relationship. These HyperOps are hosted on computation structures that are provisioned on demand at runtime. We also report compiler optimizations that collectively reduce the overheads of data-driven computations in runtime reconfigurable architectures. On an average, HyperOps offer a 44% reduction in total execution time and a 18% reduction in management overheads as compared to using basic blocks as coarse grained operations. We show that HyperOps formed using our compiler are suitable to support data flow software pipelining.

Keywords

Execution Time Total Execution Time Binary Decision Diagram Ordered Binary Decision Diagram Deblocking Filter 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2009

Authors and Affiliations

  • Mythri Alle
    • 1
  • Keshavan Varadarajan
    • 1
  • Alexander Fell
    • 1
  • S. K. Nandy
    • 1
  • Ranjani Narayan
    • 2
  1. 1.CAD LabIndian Institute Of ScienceBangaloreIndia
  2. 2.Morphing Machines Pvt. LtdBangaloreIndia

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