Abstract
Now that we have broken the threshold of one billion transistors on a chip and multi-core has become a reality, a lot of buzz has resulted – from how/why we got here, to what is important, to how we should determine how to effectively use multicore. In this talk, I will examine a number of these new “conventional wisdom” nuggets of information to try to see whether they add value or get in the way. For example: what can we expect multicore to do about saving power consumption? is ILP dead? should sample benchmarks drive future designs? is hardware sequential? should multicore structures be simple? is abstraction a fundamental good? Hopefully, our examinations will help shed some light on where we go from here.
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© 2009 Springer-Verlag Berlin Heidelberg
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Patt, Y. (2009). The Challenges of Multicore: Information and Mis-Information. In: Berekovic, M., Müller-Schloer, C., Hochberger, C., Wong, S. (eds) Architecture of Computing Systems – ARCS 2009. ARCS 2009. Lecture Notes in Computer Science, vol 5455. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-642-00454-4_3
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DOI: https://doi.org/10.1007/978-3-642-00454-4_3
Publisher Name: Springer, Berlin, Heidelberg
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