Keynote: Compilers in the Manycore Era

Abstract

Homogeneous multicore processors such as the ones proposed by Intel or AMD have become mainstream. However heterogeneous architectures, such as multicore associated with GPUs or with any hardware specialized co-processors usually offer a much higher peak performance/power ratio. When high performance and power efficiency has to be achieved, specialized hardware is often the way to go. Combining a general-purpose multicore with a highly parallel coprocessor, e.g., GPU, allows to both achieve high speedups on parallel sections while maintaining high performance on control sections.

However, programming such heterogeneous architectures is quite a challenge for any application developer. The embedded market has been living with it for decades but at a very high programming cost. The general-purpose computing is now entering this era.

Manycore performance opens HPC to many new scientific and consumer applications. New multimedia, medical and scientific applications will be developed by hundreds of thousands of engineers across the world. These applications, usually provided by ISV, will have to be tuned for thousands of various platform configurations built with different hardware units such as CPUs, GPUs, accelerators, PCIx buses, memories, etc., each configuration having its own performance profile. Furthermore, in most manycore systems, applications are in competition at run-time for hardware resources like the memory space of accelerators. If ignored this can lead to a global performance slowdown.

The past of parallel programming is scattered with hundreds of parallel languages, most of them were designed to address homogeneous architectures and concerned a small and well-trained community of HPC programmers.

With the new diversity of parallel hardware platforms and the new community of non-expert developers, expressing parallelism is not sufficient anymore. Resources management, application deployment, and portable performance are interconnected issues that require to be addressed holistically.

As many decisions should be taken according to the available hardware, resources management cannot be moved apart from parallel programming. Deploying applications on various systems without having to deal with thousands of configurations is the main concern of ISVs. The grail of parallel computing is to be able to provide portable performance by making hardware changes transparent for a large set of machines and fluctuating execution contexts.

Are general-purpose compilers obsolete?

Compilers are keystone solutions of any approaches that deal with previous challenges. But general-purpose compilers try to embrace so many domains and try to serve so many constraints that they frequently fail to achieve very high performance. They need to be deeply revisited!

Recent techniques are showing promises. Iterative compilation techniques, exploiting the large CPU cycle count now available on every PC, can be used to explore the optimization space at compile-time. Second, machine-learning techniques, e.g. Milepost project ( http://www.milepost.eu/ ), can be used to automatically improve code generation compilers strategies. Speculation can be used to deal with necessary but missing information at compile-time. Finally, dynamic techniques can select or generate at run-time the most efficient code adapted to the execution context and available hardware resources.

Future compilers will benefit from past research, but they will also need to combine static and dynamic techniques. Moreover, domain specific approaches might be needed to ensure success.

Biography of François Bodin

François Bodin cofounded CAPS (www.caps-entreprise.com) in 2002 while he was a Professor at University of Rennes I and since January 2008 he joined the company as CTO. His contribution includes new approaches for exploiting high performance processors in scientific computing and in embedded applications. Prior to joining CAPS, François Bodin held various research positions at University of Rennes I and at the INRIA research lab. He has published over 60 papers in international journals and conferences and he has supervised over 15 PhD thesis. Professor François Bodin holds a Master’s in CS and a PhD in CS, both from University of Rennes I.