Abstract
The development of microprocessors design has been shifting to multi-core architectures. Therefore, it is expected that parallelism will play a significant role in future generations of applications. Throughout the years, there has been a myriad number of parallel programming models proposed. In choosing a parallel programming model, not only the performance aspect is important, but also qualitative the aspect of how well parallelism is abstracted to developers. A model with a well abstraction of parallelism leads to a higher application-development productivity. In this paper, we propose seven criteria to qualitatively evaluate parallel programming models. Our focus is on how parallelism is abstracted and presented to application developers. As a case study, we use these criteria to investigate six well-known parallel programming models in the HPC community.
Keywords
- shared memory
- distributed memory
- Pthreads
- OpenMP
- CUDA
- MPI
- UPC
- Fortress
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References
Kish, L.B.: End of Mooreś Law: Thermal (noise) Death of Integration in Micro and nano electronics. Physics Letters A 305, 144–149 (2002)
Kish, L.B.: Mooreś Law and the Energy Requirement of Computing Versus performance. Circuits, devices and systems 151(2), 190–194 (2004)
Sun Studio 12, http://developers.sun.com/sunstudio
Asanovic, K., Bodik, R., Catanzaro, B.C., Gebis, J.J., Husbands, P., Keutzer, K., Patterson, D.A., Plishker, W.L., Shalf, J., Williams, S.W., Yelick, K.A.: The Landscape of Parallel Computing Research: a view from Berkeley. Technical Report UCB/EECS-2006-183, Electrical Engineering and Computer Sciences, University of California at Berkeley (December 2006)
Butenhof, D.R.: Programming with POSIX Threads. Addison-Wesley, Reading (1997)
OpenMP, http://www.openmp.org
Chapman, B., Jost, G., Van Der Pas, R.: Using OpenMP: Portable Shared Memory Parallel Programming. MIT Press, Cambridge (2007)
Pacheco, P.S.: Parallel Programming with MPI. Morgan Kaufmann, San Francisco (1996)
Consortium, U.: UPC Language Specifications, v1.2. Technical report (2005)
Husbands, P., Iancu, C., Yelick, K.: A Performance Analysis of the Berkeley UPC Compiler. In: ICS 2003: Proceedings of the 17th annual international conference on Supercomputing, pp. 63–73. ACM, New York (2003)
Allen, E., Chase, D., Hallett, J., Luchangco, V., Maessen, J.W., Ryu, S., Steele Jr., G.L., Tobin-Hochstadt, S.: The Fortress Language Specification Version 1.0 beta. Technical report (March 2007)
Corporation, N.: NVIDIA CUDA Programming Guide, version 1.1. Technical report (November 2007)
Grama, A., Karypis, G., Kumar, V., Gupta, A.: Introduction to Parallel Computing, 2nd edn. Addison-Wesley, Boston (2003)
OpenMPI, http://www.open-mpi.org
MVAPICH, http://mvapich.cse.ohio-state.edu
GRIDMPI, http://www.gridmpi.org
LAM/MPI, http://www.lam-mpi.org
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Kasim, H., March, V., Zhang, R., See, S. (2008). Survey on Parallel Programming Model. In: Cao, J., Li, M., Wu, MY., Chen, J. (eds) Network and Parallel Computing. NPC 2008. Lecture Notes in Computer Science, vol 5245. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-88140-7_24
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DOI: https://doi.org/10.1007/978-3-540-88140-7_24
Publisher Name: Springer, Berlin, Heidelberg
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