Vortex: A New Family of One-Way Hash Functions Based on AES Rounds and Carry-Less Multiplication

  • Shay Gueron
  • Michael E. Kounavis
Part of the Lecture Notes in Computer Science book series (LNCS, volume 5222)


We present Vortex a new family of one way hash functions that can produce message digests of 256 bits. The main idea behind the design of these hash functions is that we use well known algorithms that can support very fast diffusion in a small number of steps. We also balance the cryptographic strength that comes from iterating block cipher rounds with SBox substitution and diffusion (like Whirlpool) against the need to have a lightweight implementation with as small number of rounds as possible. We use only 3 AES rounds but with a stronger key schedule. Our goal is not to protect a secret symmetric key but to support perfect mixing of the bits of the input into the hash value. Three AES rounds are followed by our variant of Galois Field multiplication. This achieves cross-mixing between 128-bit sets. We present a set of qualitative arguments why we believe Vortex is secure.


Hash Function Block Cipher Collision Resistance Lightweight Block Cipher Merging Function 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.


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  1. 1.
    Advanced Encryption Standard, Federal Information Processing Standards Publication (1997)
  2. 2.
    Daemen, J., Rijman, V.: The Wide Trail Design Strategy. In: Honary, B. (ed.) Cryptography and Coding 2001. LNCS, vol. 2260, pp. 222–238. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  3. 3.
    Steinberger, J.P.: The Collision Intractability of MDC-2 in the Ideal Cipher Model. In: Naor, M. (ed.) EUROCRYPT 2007. LNCS, vol. 4515, pp. 35–41. Springer, Heidelberg (2007)CrossRefGoogle Scholar
  4. 4.
    Knudsen, L., Lai, X., Preneel, B.: Attacks on Fast Double Block Length Hash Functions. Journal of Cryptology, No. 11, pp. 59-72, International Association for Cryptologic Research (1998)Google Scholar
  5. 5.
    Lucks, S.: Design Principles for Iterated Hash Functions, Cryptology ePrint Archive,Report 2004/253 (2004),
  6. 6.
    Damgård, I.: A Design Principle for Hash Functions. In: Brassard, G. (ed.) CRYPTO 1989. LNCS, vol. 435, pp. 416–427. Springer, Heidelberg (1990)Google Scholar
  7. 7.
    Merkle, R.: One Way Hash Functions and DES. In: Brassard, G. (ed.) CRYPTO 1989. LNCS, vol. 435, pp. 428–446. Springer, Heidelberg (1990)Google Scholar
  8. 8.
    Black, J., Cochran, M., Shrimpton, T.: On the Impossibility of Highly Efficient Block Cipher-based Hash Functions. In: Cramer, R. (ed.) EUROCRYPT 2005. LNCS, vol. 3494, pp. 526–541. Springer, Heidelberg (2005)Google Scholar
  9. 9.
    Bellare, M., Ristenpart, T.: Multi-Property-Preserving Hash Domain Extension and the EMD Transform. In: Lai, X., Chen, K. (eds.) ASIACRYPT 2006. LNCS, vol. 4284, pp. 299–314. Springer, Heidelberg (2006)CrossRefGoogle Scholar
  10. 10.
    Secure Hash Standard, Federal Information Processing Standards Publication 180-2,
  11. 11.
    Menezes, A., Oorschot, P., Vanstone, S.: Handbook of Applied Cryptography. CRC Press, Boca Raton (1999)Google Scholar
  12. 12.
    Rudra, A., Dubey, P.K., Jutla, C.S., Kumar, V., Rao, J.R., Rohatgi, P.: Efficient Rijndael Encryption with Composite Field Arithmetic. In: Cryptographic Hardware and Embedded Systems - CHESS 2001, pp. 175–188 (2001)Google Scholar
  13. 13.
    Satoh, A., Morioka, S., Takano, K., Munetoh, S.: A Compact Rijndael Hardware Architecture with SBox Optimization. In: Boyd, C. (ed.) ASIACRYPT 2001. LNCS, vol. 2248. Springer, Heidelberg (2001)CrossRefGoogle Scholar
  14. 14.
    Moriokah, S., Satoh, A.: An Optimized S-Box Circuit Architecture for Low Power AES Design. In: Cryptographic Hardware and Embedded Systems - CHESS 2001, pp. 172–186 (2002)Google Scholar
  15. 15.
    Gueron, S., Parzanchevsky, O., Zuk, O.: Masked Inversion in GF(2n) Using Mixed Field Representations and its Efficient Implementation for AES. In: Nedjah, N., de Macedo Mourelle, L. (eds.) Embedded Cryptographic Hardwdare: Methodologies & Architectures, Nova Science Publishers, Inc (2004); (ISBN: 1-59454-012-8) Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2008

Authors and Affiliations

  • Shay Gueron
    • 2
    • 3
  • Michael E. Kounavis
    • 1
  1. 1.Corporate Technology Group, Intel CorporationHillsboroUSA
  2. 2.Department of Mathematics, Faculty of Science and Science EducationUniversity of HaifaHaifaIsrael
  3. 3.Mobility Group, Intel Corporation, Intel Design CenterHaifaIsrael

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