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Exploiting MOEA to Automatically Geneate Test Programs for Path-Delay Faults in Microprocessors

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Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4974))

Abstract

This paper presents an innovative approach for the generation of test programs detecting path-delay faults in microprocessors. The proposed method takes advantage of the multiobjective implementation of a previously devised evolutionary algorithm and exploits both gate- and RT-level descriptions of the processor: the former is used to build Binary Decision Diagrams (BDDs) for deriving fault excitation conditions; the latter is used for the automatic generation of test programs able to excite and propagate fault effects, based on a fast RTL simulation. Experiments on an 8-bit microcontroller show that the proposed method is able to generate suitable test programs more efficiently compared to existing approaches.

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Mario Giacobini Anthony Brabazon Stefano Cagnoni Gianni A. Di Caro Rolf Drechsler Anikó Ekárt Anna Isabel Esparcia-Alcázar Muddassar Farooq Andreas Fink Jon McCormack Michael O’Neill Juan Romero Franz Rothlauf Giovanni Squillero A. Şima Uyar Shengxiang Yang

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© 2008 Springer-Verlag Berlin Heidelberg

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Bernardi, P., Christou, K., Grosso, M., Michael, M.K., Sánchez, E., Reorda, M.S. (2008). Exploiting MOEA to Automatically Geneate Test Programs for Path-Delay Faults in Microprocessors. In: Giacobini, M., et al. Applications of Evolutionary Computing. EvoWorkshops 2008. Lecture Notes in Computer Science, vol 4974. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-78761-7_23

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  • DOI: https://doi.org/10.1007/978-3-540-78761-7_23

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-78760-0

  • Online ISBN: 978-3-540-78761-7

  • eBook Packages: Computer ScienceComputer Science (R0)

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