Dependability Evaluation of Time-Redundancy Techniques in Integer Multipliers

  • Henrik Eriksson
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4644)

Abstract

An evaluation of the fault tolerance which can be achieved by the use of time-redundancy techniques in integer multipliers has been conducted. The evaluated techniques are: swapped inputs, inverted reduction tree, a novel use of the half precision mode in a twin-precision multiplier, and a combination of the first two techniques. The faults which have been injected are single stuck-at-zero or stuck-at-one faults. Error detection coverage has been the evaluation criteria. Depending on the technique, the attained error detection coverage spans from 25% to 90%.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Avizienis, A., Laprie, J.-C., Randall, B., Landwehr, C.: Basic Concepts and Taxonomy of Dependable and Secure Computing. IEEE Transactions on Dependable and Secure Computting 1(1), 11–33 (2004)CrossRefGoogle Scholar
  2. 2.
    Parhami, B.: Computer Arithmetic – Algorithms and Hardware Design, 1st edn. Oxford University Press, Oxford (2000)Google Scholar
  3. 3.
    Wallace, C.S.: A Suggestion for a Fast Multiplier. IEEE Transactions on Electronic Computers 13, 14–16 (1964)MATHCrossRefGoogle Scholar
  4. 4.
    Dadda, L.: Some Schemes for Parallel Adders. Acta Frequenza 42(5), 349–356 (1965)Google Scholar
  5. 5.
    Oklobdzija, V.G., Villeger, D., Liu, S.S.: A Method for Speed Optimized Partial Production and Generation of Fast Parallel Multipliers Using an Algorithmic Approach. IEEE Transactions on Computers 45(8), 294–306 (1995)Google Scholar
  6. 6.
    Alderighi, M., D’Angelo, S., Metra, C., Sechi, G.R.: Novel Fault-Tolerant Adder Design for FPGA-Based Systems. In: Proceedings of the 7th International On-Line Testing Workshop, pp. 54–58 (2001)Google Scholar
  7. 7.
    Hsu, Y.-M., Swartzlander, Jr., E.E.: Reliability Estimation for Time Redundant Error Correcting Adders and Multipliers. In: Proceedings of IEEE International Workshop on Defect and Fault Tolerance in VLSI Systems (DFT), pp. 159–167. IEEE Computer Society Press, Los Alamitos (1994)Google Scholar
  8. 8.
    Namba, K., Ito, H.: Design of Defect Tolerant Wallace Multiplier. In: Proceedings of the 11th IEEE Pacific Rim International Symposium on Dependable Computing (PRDC), pp. 159–167. IEEE Computer Society Press, Los Alamitos (2005)Google Scholar
  9. 9.
    Radhakrishnan, D., Preethy, A.P.: A Novel 36 Bit Single Fault-Tolerant Multiplier Using 5 Bit Moduli. In: Proceedings of IEEE Region 10 International Conference (TENCON 1998), pp. 128–130. IEEE Computer Society Press, Los Alamitos (1998)Google Scholar
  10. 10.
    Pradhan, D.K.: Fault-Tolerant Computer System Design, 1st edn. Prentice-Hall, Englewood Cliffs (1996)Google Scholar
  11. 11.
    Rabaey, J.M., Chandrakasan, A., Nikolic, B.: Digital Integrated Circuits, 2nd edn. Prentice-Hall, Englewood Cliffs (2003)Google Scholar
  12. 12.
    Sjalander, M., Eriksson, H., Larsson-Edefors, P.: An Efficient Twin-Precision Multiplier. In: Proceedings of the IEEE International Conference on Computer Design (ICCD 2004), IEEE Computer Society Press, Los Alamitos (2004)Google Scholar
  13. 13.
    Mokrian, P., Ahmadi, M., Jullien, G., Miller, W.C.: A Reconfigurable Digital Multiplier Architecture. In: Proceedings of the Canadian Conference on Electrical and Computer Engineering (CCECE) (2003)Google Scholar
  14. 14.
    Eriksson, H., Larsson-Edefors, P., Sheeran, M., Sjalander, M., Johansson, D., Scholin, M.: Multiplier Reduction Tree with Logarithmic Logic Depth and Regular Connectivity. In: Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), IEEE Computer Society Press, Los Alamitos (2006)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2007

Authors and Affiliations

  • Henrik Eriksson
    • 1
  1. 1.SP Technical Research Institute of Sweden, Box 857, SE-501 15 BoråsSweden

Personalised recommendations