Abstract
The application of asynchronous circuit has been greatly restricted by reason of lacking effective technologies to test. Making use of the self-checking property of asynchronous control circuit, we may preferably solve this problem. In the paper, we put forward an improved, fail-stop David Cell, describe a way of designing self-checking asynchronous control circuits by the direct mapping technique, and propose the testing method for single stuck-at faults. The result shows that self-checking counterpart can be tested at normal operation speed and the area overhead is acceptable.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Beerel, P.A., Meng, T.H.-Y.: Semi-modularity and testability of speed-independent circuits. Integration, the VLSI journal 13(3), 301–322 (1992)
Bystrov, A., Yakovlev, A.: Asynchronous circuit synthesis by direct mapping: Interfacing to environment. In: Proc. International Symposium on Advanced Research in Asynchronous Circuits and Systems, April 2002, pp. 127–136 (2002)
David, R.: Modular design of asynchronous circuits defined by graphs. IEEE Transactions on Computers 26(8), 727–737 (1977)
Hauck, S.: Asynchronous design methodologies: An overview. Proceedings of the IEEE 83(1), 69–93 (1995)
Hollaar, L.A.: Direct implementation of asynchronous control units. IEEE Transactions on Computers C-31(12), 1133–1141 (1982)
Hulgaard, H., Burns, S.M., Borriello, G.: Testing asynchronous circuits: A survey. Integration, the VLSI journal 19(3), 111–131 (1995)
Kishinevsky, M., Kondratyev, A., Taubin, A., Varshavsky, V.: Concurrent Hardware: The Theory and Practice of Self-Timed Design. In: Series in Parallel Computing, John Wiley & Sons, Chichester (1994)
Lavagno, L., Sangiovanni-Vincentelli, A.: Algorithms for Synthesis and Testing of Asynchronous Circuits. Kluwer Academic Publishers, Dordrecht (1993)
Liebelt, M.J., Burgess, N.: Detecting exitory stuck-at faults in semimodular asynchronous circuits. IEEE Transactions on Computers 48(4), 442–448 (1999)
Martin, A.J., Hazewindus, P.J.: Testing delay-insensitive circuits. In: Séquin, C.H. (ed.) Advanced Research in VLSI, pp. 118–132. MIT Press, Cambridge (1991)
Montanari, U., Rossi, F.: Contextual nets. Acta Informatica 32(6), 545–596
Shang, D.: Asynchronous communication circuits: Design, test and synthesis. Technical Report NCL-EECE-MSD-TR-2003-100, University of Newcastle upon Tyne, UK (2003)
Shang, D., Xia, F., Yakovlev, A.: Asynchronous circuit synthesis via direct translation. In: Proc. International Symposium on Circuits and Systems, May 2000, vol. 3, pp. 369–372 (2000)
Sokolov, D., Yakovlev, A.: Clockless circuits and system synthesis. IEE Proceedings, Computers and Digital Techniques 152(3), 298–316 (2005)
Unger, S.H.: Asynchronous Sequential Switching Circuits. Wiley-Interscience, John Wiley & Sons, Inc., New York (1969)
Varshavsky, V.I. (ed.): Self-Timed Control of Concurrent Processes: The Design of Aperiodic Logical Circuits in Computers and Discrete Systems. Kluwer Academic Publishers, Dordrecht, The Netherlands (1990)
Yakovlev, A.V., Koelmans, A.M., Lavagno, L.: High-level modeling and design of asynchronous interface logic. IEEE Design & Test of Computers 12(1), 32–40 (1995)
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 2007 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Ruan, J., Wang, Z., Dai, K., Li, Y. (2007). Design and Test of Self-checking Asynchronous Control Circuit. In: Azémard, N., Svensson, L. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2007. Lecture Notes in Computer Science, vol 4644. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-74442-9_31
Download citation
DOI: https://doi.org/10.1007/978-3-540-74442-9_31
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-74441-2
Online ISBN: 978-3-540-74442-9
eBook Packages: Computer ScienceComputer Science (R0)