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Parallel Hardware Architecture to Simulate Movable Creatures in the CA Model

  • Mathias Halbach
  • Rolf Hoffmann
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4671)

Abstract

The general question of our investigation is: how can the simulation of moving objects (or agents) in a cellular automaton (CA) be accelerated by hardware architectures. We exemplify our approach using the creatures’ exploration problem: n creatures are moving around in an unknown environment in order to visit all cells in shortest time. This problem is modeled as CA because this model is massively parallel and therefore it can be perfectly supported by hardware (FPGA technology). We need a very fast simulation because we want to observe and evaluate the collaborative performance for a different number of creatures, different behaviors of the creatures and for many different environments. As a main result from these simulations and evaluations we expect to find the best algorithms which can fulfill the task with the lowest work units (generations × creatures). In this contribution we have investigated the question how the creatures’ exploration problem can be accelerated in hardware with a minimum of hardware resources. We have designed and evaluated five different architectures that vary in the combination or separation of the logic for the environment, for the creatures and for the collision detection. A speedup in the range of thousands compared to software can be reached using an architecture which separates the environment from the creatures and makes use of the memory banks embedded in the FPGA.

Keywords

State Machine Cellular Automaton Clock Cycle Collision Detection Memory Bank 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer-Verlag Berlin Heidelberg 2007

Authors and Affiliations

  • Mathias Halbach
    • 1
  • Rolf Hoffmann
    • 1
  1. 1.TU Darmstadt, FB Informatik, FG Rechnerarchitektur, Hochschulstraße 10, D-64289 DarmstadtGermany

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