Skip to main content
SpringerLink
Log in

Architectural Design, Behavior Modeling and Run-Time Verification of Network Embedded Systems

  • Conference paper
Reliable Systems on Unreliable Networked Platforms (Monterey Workshop 2005)

Part of the book series: Lecture Notes in Computer Science ((LNPSE,volume 4322))

Included in the following conference series:

Abstract

There is an increasing need for today’s autonomous systems to collaborate in real-time over wireless networks. These systems need to interact closely with other autonomous systems and function under tight timing and control constraints. This paper concerns with the modeling and quality assurance of the timing behavior of such network embedded systems. It builds upon our previous work on run-time model checking of temporal correctness properties and automatic white-box testing using run-time assertion checking. This paper presents an architecture for the network embedded systems, a lightweight formal method that is based on formal statechart assertions for the design and development of networked embedded systems, and a process of using run-time monitoring and verification, in tandem with modeling and simulation, to study the timing requirements of complex systems early in the design process.

This is a preview of subscription content, log in via an institution to check access.

Access this chapter

Log in via an institution
Chapter
USD 29.95
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
eBook
USD 39.99
Price excludes VAT (USA)
  • Available as PDF
  • Read on any device
  • Instant download
  • Own it forever
Softcover Book
USD 54.99
Price excludes VAT (USA)
  • Compact, lightweight edition
  • Dispatched in 3 to 5 business days
  • Free shipping worldwide - see info

Tax calculation will be finalised at checkout

Purchases are for personal use only

Institutional subscriptions

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. Beck, K., Gamma, E.: Test infected: Programmers love writing tests. Java Report 3(7), 37–50 (1998)

    Google Scholar 

  2. Caffall, D., Cook, T., Drusinsky, D., Michael, J.B., Shing, M., Sklavounos, N.: Formal Specification and Run-time Monitoring within the Ballistic Missile Defense Project. Tech. Report NPS-CS-05-007. Naval Postgraduate School, Monterey, California (June 2005)

    Google Scholar 

  3. Chang, E., Pnueli, A., Manna, Z.: Compositional Verification of Real-Time Systems. In: Proc. 9th IEEE Symp. On Logic In Computer Science, pp. 458–465. IEEE Computer Society Press, Los Alamitos (1994)

    Google Scholar 

  4. Drusinsky, D.: The Temporal Rover and ATG Rover. In: Havelund, K., Penix, J., Visser, W. (eds.) SPIN Model Checking and Software Verification. LNCS, vol. 1885, pp. 323–329. Springer, Heidelberg (2000)

    Chapter  Google Scholar 

  5. Drusinsky, D.: Semantics and Runtime Monitoring of TLCharts: Statechart Automata with Temporal Logic Conditioned Transitions. In: Proc. 4th Runtime Verification Workshop (RV’04), Invited paper (2004)

    Google Scholar 

  6. Drusinsky, D.: Modeling and Verification Using UML Statecharts A Working Guide to Reactive System Design, Runtime Monitoring and Execution-based Model Checking. Elsevier, Amsterdam (2006)

    Google Scholar 

  7. Drusinsky, D., Harel, D.: On the power of bounded concurrency I: Finite Automata. J. ACM 41(3), 517–539 (1994)

    Article  MATH  MathSciNet  Google Scholar 

  8. Drusinsky, D., Shing, M.: Verification of Timing Properties in Rapid System Prototyping. In: Proc. 14th IEEE International Workshop in Rapid Systems Prototyping, San Diego, California, June 9-11, 2003, pp. 47–53. IEEE Computer Society Press, Los Alamitos (2003)

    Chapter  Google Scholar 

  9. Drusinsky, D., Shing, M., Demir, K.: Creation and Validation of Embedded Assertion Statecharts. In: Proc. 17th IEEE International Workshop in Rapid Systems Prototyping, Chania, Greece, June 14-16, 2006, pp. 17–23. IEEE Computer Society Press, Los Alamitos (2006)

    Google Scholar 

  10. Drusinsky, D., Watney, G.: Applying run-time monitoring to the Deep-Impact Fault Protection Engine. In: Proc. 28th NASA Goddard Software Engineering Workshop, Dec., pp. 127–133 (2003)

    Google Scholar 

  11. Easterbrook, S., Lutz, R., Covington, R., Kely, J., Ampo, Y., Hamilton, D.: Experiences using lightweight formal methods for requirements modeling. IEEE Trans. Software Engineering 24(1), 4–11 (1998)

    Article  Google Scholar 

  12. Graw, G., Herrmann, P., Krumm, H.: Verification of UML-Based Real-Time System Design by Means of cTLA. In: Proc. 3rd IEEE International Symposium on Object-Oriented Real-Time Distributed Computing (ISORC 2000), 15-17 March 2000, pp. 86–95. IEEE Computer Society Press, Los Alamitos (2000)

    Google Scholar 

  13. Greenberg, A., Hjalmtysson, G., Maltz, D., Myers, A., Rexford, J., Xie, G., Yan, H., Zhang, H.: A Clean Slate 4D Approach to Network Control and Management. ACM SIGCOMM Computer Communication Review. 35(5), 41–54 (2005)

    Article  Google Scholar 

  14. Guldner, J., Patwardhan, S., Tan, H.S., Zhang, W.B.: Coding of Magnetic Markers for Demonstration of Automated Highway Systems. Preprints of the Transportation Research Board Annual Meeting, Washington, DC (1997)

    Google Scholar 

  15. Harel, D.: A Visual Formalism for Complex Systems. Science of Computer Programming 8, 231–274 (1987)

    Article  MATH  MathSciNet  Google Scholar 

  16. Havelund, K., Pressburger, T.: Model Checking Java Programs Using Java PathFinder. International Journal on Software Tools for Technology Transfer 2(4) (2000)

    Google Scholar 

  17. Havelund, K., Rosu, G.: An Overview of the Runtime Verification Tool Java PathExplorer. Formal Methods in System Design 24(2), 189–215 (2004)

    Article  MATH  Google Scholar 

  18. JUnit.org, http://www.junit.org/

  19. Lüth, L., Niehaus, J., Peikenkamp, T.: HW/SW Co-synthesis using Statecharts and Symbolic Timing Diagrams. In: Proc. 9th International Workshop on Rapid System Prototyping, 3-5 June, pp. 212–217 (1998)

    Google Scholar 

  20. OMNeT++ Discrete Event Simulation System. http://www.omnetpp.org/

  21. Park, M.H., Bang, K.S., Choi, J.Y., Kang, I.: Equivalence Checking of Two Statechart Specifications. In: Proc. 11the International Workshop on Rapid System Prototyping, 21-23 June, pp. 46–51 (2000)

    Google Scholar 

  22. Pnueli, A.: The Temporal Logic of Programs. In: Proc.18th IEEE Symp. on Foundations of Computer Science, pp. 46–57. IEEE Computer Society Press, Los Alamitos (1977)

    Google Scholar 

  23. Selic, B., Gullekson, G., Ward, P.: Real-Time Object Oriented modeling. John Wiley & Sons, Chichester (1994)

    MATH  Google Scholar 

  24. Selic, B., Rumbaugh, J.: Using UML for Modeling Complex Real-Time Systems. Unpublished white paper, Rational Software (Apr. 4, 1998), http://www.rational.com/media/whitepapers/umlrt.pdf

  25. Tsugawa, S., Kato, S., Tokuda, K., Matsui, T., Fujii, H.: A cooperative driving system with automated vehicles and intervehicle communications in demo 2000. In: Proc. IEEE Intelligent Transportation Systems Conference, pp. 918–923. IEEE Computer Society Press, Los Alamitos (2001)

    Google Scholar 

  26. Tan, H.S., Rajamani, R., Zhang, W.B.: Demonstration of an Automated Highway Platoon System. In: Proc. American Control Conference, Philadelphia, Pennsylvania, June, pp. 1823–1827 (1998)

    Google Scholar 

  27. Xu, Q., Hedrick, K., Sengupta, R., VanderWerf, J.: Effects of vehicle-vehicle/roadside-vehicle communication on adaptive cruise controlled highway systems. In: Proc. 56th IEEE Vehicular Technology Conference, vol. 2, pp. 1249–1253. IEEE, Los Alamitos (2002)

    Google Scholar 

Download references

Author information

Authors and Affiliations

  1. Department of Computer Science, Naval Postgraduate School, Monterey, CA 93943-5118, USA

    Man-Tak Shing & Doron Drusinsky

  2. Time Rover Inc., Cupertino, CA 95014, USA

    Doron Drusinsky

Authors
  1. Man-Tak Shing
    View author publications

    You can also search for this author in PubMed Google Scholar

  2. Doron Drusinsky
    View author publications

    You can also search for this author in PubMed Google Scholar

Editor information

Fabrice Kordon Janos Sztipanovits

Rights and permissions

Reprints and permissions

Copyright information

© 2007 Springer Berlin Heidelberg

About this paper

Cite this paper

Shing, MT., Drusinsky, D. (2007). Architectural Design, Behavior Modeling and Run-Time Verification of Network Embedded Systems. In: Kordon, F., Sztipanovits, J. (eds) Reliable Systems on Unreliable Networked Platforms. Monterey Workshop 2005. Lecture Notes in Computer Science, vol 4322. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-71156-8_15

Download citation

  • DOI: https://doi.org/10.1007/978-3-540-71156-8_15

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-71155-1

  • Online ISBN: 978-3-540-71156-8

  • eBook Packages: Computer ScienceComputer Science (R0)

Publish with us

Policies and ethics

Search

Navigation