Abstract
Daedalus is a system-level design flow for the design of multiprocessor system-on-chip (MP-SoC) based embedded multimedia systems. It offers a fully integrated tool-flow in which design exploration, system-level synthesis, application mapping, and system prototyping of MP-SoC architectures are highly automated. In this paper, we describe Daedalus from a software perspective, explaining its supporting software infrastructure and the way the various tools interoperate. Moreover, we discuss the lack of support for achieving tool interoperability that we have encountered during the development of Daedalus, and present several ideas of future research directions to address this issue. More specifically, we argue that a so-called Common Design Flow Infrastructure (CDFI) for system-level design flows is needed to improve and stimulate research and development in the area of system-level design methodology.
This is a preview of subscription content, log in via an institution to check access.
Access this chapter
Tax calculation will be finalised at checkout
Purchases are for personal use only
Preview
Unable to display preview. Download preview PDF.
References
Martin, G.: Overview of the MPSoC Design Challenge. In: Proc. Design Automation Conference (DAC 2006), San Francisco, USA (2006)
Mihal, A., Keutzer, K.: Mapping concurrent applications onto architectural platforms. In: Networks on Chips, pp. 39–59. Kluwer Academic Publishers, Dordrecht (2003)
Thompson, M., Stefanov, T., Nikolov, H., Pimentel, A.D., Erbas, C., Polstra, S., Deprettere, E.F.: A framework for rapid system-level exploration, synthesis, and programming of multimedia MP-SoCs. In: Proc. of the Int. Conference on Hardware-Software Codesign and System Synthesis (CODES+ISSS 2007), pp. 9–14 (2007)
Nikolov, H., Thompson, M., Stefanov, T., Pimentel, A.D., Polstra, S., Bose, R., Zissulescu, C., Deprettere, E.F.: Daedalus: Toward composable multimedia MP-SoC design. In: Proc. of the Design Automation Conference (DAC 2008) (2008)
Daedalus system-level design, http://daedalus.liacs.nl/
Verdoolaege, S., Nikolov, H., Stefanov, T.: PN: a tool for improved derivation of process networks. EURASIP Journal on Embedded Systems (2007) doi:10.1155/2007/75947
Kahn, G.: The semantics of a simple language for parallel programming. In: Proc. of the IFIP Congress, vol. 74 (1974)
Stefanov, T., Kienhuis, B., Deprettere, E.F.: Algorithmic transformation techniques for efficient exploration of alternative application instances. In: Proc. of the Int. Symposium on Hardware/Software Codesign (CODES), pp. 7–12 (2002)
Pimentel, A.D., Erbas, C., Polstra, S.: A systematic approach to exploring embedded system architectures at multiple abstraction levels. IEEE Trans. on Computers 55, 99–112 (2006)
Erbas, C., Pimentel, A.D., Thompson, M., Polstra, S.: A framework for system-level modeling and simulation of embedded systems architectures. EURASIP Journal on Embedded Systems (2007) doi:10.1155/2007/82123
Nikolov, H., Stefanov, T., Deprettere, E.F.: Multi-processor system design with ESPAM. In: Proc. of the Int. Conf. on HW/SW Codesign and System Synthesis (CODES+ISSS 2006), pp. 211–216 (2006)
Nikolov, H., Stefanov, T., Deprettere, E.F.: Systematic and automated multi-processor system design, programming, and implementation. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (TCAD) 27, 542–555 (2008)
Pimentel, A.D., Thompson, M., Polstra, S., Erbas, C.: Calibration of abstract performance models for system-level design space exploration. Journal of Signal Processing Systems for Signal, Image, and Video Technology 50 (2008)
OCP-IP, http://www.ocpip.org/
SPIRIT, http://www.spiritconsortium.org/
Ludäscher, B., et al.: Scientific workflow management and the kepler system. Concurrency and Computation: Practice & Experience 18 (2006)
Kangas, T., et al.: UML-based multi-processor SoC design framework. ACM Trans. on Embedded Computing Systems 5, 281–320 (2006)
McAllister, J., Woods, R., Fischaber, S., Malins, E.: Rapid implementation and optimisation of DSP systems on FPGA-centric heterogeneous platforms. Journal of Systems Architecture 53, 511–523 (2007)
Stefanov, T., et al.: System design using Kahn process networks: The Compaan/Laura approach. In: Proc. of the Int. Conference on Design, Automation and Test in Europe (DATE), pp. 340–345 (2004)
Rutten, M.J., et al.: A Heterogeneous Multiprocessor Architecture for Flexible Media Processing. IEEE Design & Test of Computers 19 (2002)
Lyonnard, D., et al.: Automatic Generation of Application-Specific Architectures for Heterogeneous Multiprocessor System-on-Chip. In: Proc. of the Design Automation Conference (DAC 2001) (2001)
Gerstlauer, A., Gajski, D.: System-level abstraction semantics. In: Proc. 15th Int. Symposium on System Synthesis (ISSS 2002), pp. 231–236 (2002)
Author information
Authors and Affiliations
Editor information
Rights and permissions
Copyright information
© 2008 Springer-Verlag Berlin Heidelberg
About this paper
Cite this paper
Pimentel, A.D., Stefanov, T., Nikolov, H., Thompson, M., Polstra, S., Deprettere, E.F. (2008). Tool Integration and Interoperability Challenges of a System-Level Design Flow: A Case Study. In: Bereković, M., Dimopoulos, N., Wong, S. (eds) Embedded Computer Systems: Architectures, Modeling, and Simulation. SAMOS 2008. Lecture Notes in Computer Science, vol 5114. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-70550-5_19
Download citation
DOI: https://doi.org/10.1007/978-3-540-70550-5_19
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-70549-9
Online ISBN: 978-3-540-70550-5
eBook Packages: Computer ScienceComputer Science (R0)