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Reducing Branch Misprediction Penalties Via Adaptive Pipeline Scaling

  • Chang-Ching Yeh
  • Kuei-Chung Chang
  • Tien-Fu Chen
  • Chingwei Yeh
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 4367)

Abstract

Pipeline scaling provides an attractive solution for increasingly serious branch misprediction penalties within deep pipeline processor. In this paper we investigate Adaptive Pipeline Scaling (APS) techniques that are related to reducing branch misprediction penalties. We present a dual supply-voltage architecture framework that can be efficiently exploited in an deep pipeline processor to reduce pipeline depth depending on the confidence level of branches in pipeline. We also propose two techniques, Dual Path Index Table (DPIT) and Step-By-Step (STEP) manner, that increase the efficiency for pipeline scaling . With these techniques, we then show that APS not only provides a fast branch misprediction recovery, but also speeds up the resolve of mispredicted branch. The evaluation of APS in a 13-stage superscalar processor with benchmarks from SPEC2000 applications shows a performance improvement (between 3%-12%, average 8%) over baseline processor that does not exploit APS.

Keywords

Pipeline Stage Dynamic Voltage Scaling Branch Prediction Energy Overhead Additional Energy Consumption 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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Copyright information

© Springer Berlin Heidelberg 2007

Authors and Affiliations

  • Chang-Ching Yeh
    • 1
  • Kuei-Chung Chang
    • 1
  • Tien-Fu Chen
    • 1
  • Chingwei Yeh
    • 1
  1. 1.National Chung Cheng University, Chia-Yi 621, TaiwanR.O.C.

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