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OpenMP on Multicore Architectures

  • Conference paper
Book cover A Practical Programming Model for the Multi-Core Era (IWOMP 2007)

Part of the book series: Lecture Notes in Computer Science ((LNTCS,volume 4935))

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Abstract

Dualcore processors are already ubiquitous, quadcore processors will spread out this year, systems with a larger number of cores exist, and more are planned. Some cores even execute multiple threads. Are these processors just SMP systems on a chip? Is OpenMP ready to be used for these architectures? We take a look at the cache and memory architecture of some popular modern processors using kernel programs and some application codes which have been developed for large shared memory machines beforehand.

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References

  1. Terboven, C., Spiegel, A., an Mey, D., Gross, S., Reichelt, V.: Parallelization of the C++ Navier-Stokes Solver DROPS with OpenMP. In: Proc. ParCo 2005, Malaga, Spain, September 2005. NIC book series, Research Centre Jülich, Germany, vol. 33 (2005)

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Authors and Affiliations

Authors

Editor information

Barbara Chapman Weiming Zheng Guang R. Gao Mitsuhisa Sato Eduard Ayguadé Dongsheng Wang

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© 2008 Springer-Verlag Berlin Heidelberg

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Terboven, C., an Mey, D., Sarholz, S. (2008). OpenMP on Multicore Architectures. In: Chapman, B., Zheng, W., Gao, G.R., Sato, M., Ayguadé, E., Wang, D. (eds) A Practical Programming Model for the Multi-Core Era. IWOMP 2007. Lecture Notes in Computer Science, vol 4935. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-69303-1_5

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  • DOI: https://doi.org/10.1007/978-3-540-69303-1_5

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-69302-4

  • Online ISBN: 978-3-540-69303-1

  • eBook Packages: Computer ScienceComputer Science (R0)

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