Abstract
The chapter is devoted to the design and optimization of some basic CMCU structures. Corresponding methods are discussed for the CMCU basic structure as well as for the CMCU with common memory. The problem of the set of operator vertices of the initial GSA is solved first. The resulted partition includes minimum possible number of OLCs. Next, the method of natural microinstruction addressing is discussed and its solution in case of CMCU given. It is shown that optimization methods used in the case of Moore FSM can be used to optimize the CMCU hardware amount. All methods presented in this book are oriented towards decreasing of hardware amount in the CMCU logic circuits.
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Barkalov, A., Titarenko, L. (2008). Synthesis of basic circuits of compositional microprogram control units. In: Barkalov, A., Titarenko, L. (eds) Logic Synthesis for Compositional Microprogram Control Units. Lecture Notes Electrical Engineering, vol 22. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-69285-0_3
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DOI: https://doi.org/10.1007/978-3-540-69285-0_3
Publisher Name: Springer, Berlin, Heidelberg
Print ISBN: 978-3-540-69283-6
Online ISBN: 978-3-540-69285-0
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