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Serial Hardware Libraries for Reconfigurable Designs

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Book cover Field Programmable Logic and Applications (FPL 1999)

Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 1673))

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Abstract

We describe serial hardware libraries which have been developed as building blocks for designs involving arithmetic, digital signal processing and video operations. These libraries are parametrised in various ways to provide the appropriate amount of serialisation and pipelining. They can be used for producing a wide range of implementations, including digit-serial circuits as well as LPGS and LSGP designs. The layout of such implementations can be controlled using device-specific placement constraints. Tools are being developed to assist production of correct, efficient and well-documented hardware libraries. Our experiments illustrate the conditions under which serial multipliers are more effective than parallel multipliers in Xilinx Virtex technology.

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References

  1. Chang, Y.N., Satyanarayana, J.H., Parhi, K.K.: Systematic design of highspeed and low-power digit-serial multipliers. IEEE Trans. Circuits and Systems-II 45(12), 1585–1598 (1998)

    Article  Google Scholar 

  2. Kung, S.Y.: VLSI Array Processors. Prentice Hall, Englewood Cliffs (1988)

    Google Scholar 

  3. Lee, H., Sobelman, G.E.: Digit-serial DSP library for optimized FPGA configuration. In: Proc. IEEE Symp. on FPGAs for Custom Computing Machines, pp. 322–323. IEEE Computer Society Press, Los Alamitos (1998)

    Google Scholar 

  4. Ludwig, S.: Virtex daughtercard for PCI-Pamette (April 1999) (unpublished note)

    Google Scholar 

  5. Luk, W.: Systematic serialisation of array-based architectures. Integration 14(3), 333–360 (1993)

    MATH  Google Scholar 

  6. Luk, W., Guo, S., Shirazi, N., Zhuang, N.: A framework for developing parametrised FPGA libraries. In: Glesner, M., Hartenstein, R.W. (eds.) FPL 1996. LNCS, vol. 1142, pp. 24–33. Springer, Heidelberg (1996)

    Google Scholar 

  7. Luk, W., McKeever, S.: Pebble: a language for parametrised and reconfigurable hardware design. In: Hartenstein, R.W., Keevallik, A. (eds.) FPL 1998. LNCS, vol. 1482, pp. 9–18. Springer, Heidelberg (1998)

    Chapter  Google Scholar 

  8. Luk, W., Ng, C.S., Mang, F.: Serialising heterogeneous and non-factorisable processor arrays. Designing Correct Circuits. Springer Electronic Workshop in Computing Series (1996), http://ewic.springer.co.uk/workshops/DCC96/

  9. Luk, W., Siganos, D., Fowler, T.: Automating qualification of reconfigurable cores. Reconfigurable Systems, IEE Digest, 99/061 (1999)

    Google Scholar 

  10. Smith, S.G., Denyer, P.: Serial-Data Computations. Kluwer, Dordrecht (1988)

    Google Scholar 

  11. Tenca, A.F., Ercegovac, M.D.: A variable long-precision arithmetic unit design for reconfigurable coprocessor architectures. In: Proc. IEEE Symp. on FPGAs for Custom Computing Machines, pp. 216–225. IEEE Computer Society Press, Los Alamitos (1998)

    Chapter  Google Scholar 

  12. Turner, L.E., Graumann, P.: Rapid hardware prototyping of digital signal processing systems using field programmable gate arrays. In: Moore, W., Luk, W. (eds.) FPL 1995. LNCS, vol. 975. Springer, Heidelberg (1995)

    Google Scholar 

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© 1999 Springer-Verlag Berlin Heidelberg

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Luk, W., Derbyshire, A., Guo, S., Siganos, D. (1999). Serial Hardware Libraries for Reconfigurable Designs. In: Lysaght, P., Irvine, J., Hartenstein, R. (eds) Field Programmable Logic and Applications. FPL 1999. Lecture Notes in Computer Science, vol 1673. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-48302-1_19

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  • DOI: https://doi.org/10.1007/978-3-540-48302-1_19

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-66457-4

  • Online ISBN: 978-3-540-48302-1

  • eBook Packages: Springer Book Archive

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