Advertisement

On the Hausdorff Voronoi Diagram of Point Clusters in the Plane

  • Evanthia Papadopoulou
Conference paper
Part of the Lecture Notes in Computer Science book series (LNCS, volume 2748)

Abstract

We study the Hausdorff Voronoi diagram of point clusters in the plane and derive a tight combinatorial bound on its structural complexity. We present a plane sweep algorithm for the construction of this diagram improving upon previous results. Motivation for the investigation of this type of Voronoi diagram comes from the problem of computing the critical area of a VLSI Layout, a measure reflecting the sensitivity of the design to spot defects during manufacturing.

Keywords

Convex Hull Voronoi Diagram Point Cluster Voronoi Region Event Queue 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

Preview

Unable to display preview. Download preview PDF.

Unable to display preview. Download preview PDF.

References

  1. 1.
    Abellanas, M., Hernandez, G., Klein, R., Neumann-Lara, V., Urrutia, J.: A Combinatorial Property of Convex Sets. Discrete Computat. Geometry 17, 307–318 (1997)zbMATHCrossRefMathSciNetGoogle Scholar
  2. 2.
    Dehne, F., Klein, R.: “The Big Sweep”: On the power of the Wavefront Approach to Voronoi Diagrams”. Algorithmica 17, 19–32 (1997)zbMATHCrossRefMathSciNetGoogle Scholar
  3. 3.
    Edelsbrunner, H., Guibas, L.J., Sharir, M.: “The upper envelope of piecewise linear functions: algorithms and applications”. Discrete Computat. Geometry 4, 311–336 (1989)zbMATHCrossRefMathSciNetGoogle Scholar
  4. 4.
    Fortune, S.J.: A sweepline algorithm for Voronoi diagrams. Algorithmica 2, 153–174 (1987)zbMATHCrossRefMathSciNetGoogle Scholar
  5. 5.
    Klein, R., Mehlhorn, K., Meiser, S.: Randomized Incremental Construction of Abstract Voronoi diagrams. Computational geometry: Theory and Applications 3, 157–184 (1993)zbMATHMathSciNetGoogle Scholar
  6. 6.
    Maly, W.: Computer Aided Design for VLSI Circuit Manufacturability. In: Proc. IEEE, vol. 78(2), pp. 356–392 (1990)Google Scholar
  7. 7.
    Papadopoulou, E.: Critical Area Computation for Missing Material Defects in VLSI Circuits. IEEE Transactions on Computer-Aided Design 20(5), 583–597 (2001)CrossRefGoogle Scholar
  8. 8.
    Papadopoulou, E., Lee, D.T.: Critical Area Computation via Voronoi Diagrams. IEEE Trans. on Computer-Aided Design 18(4), 463–474 (1999)CrossRefGoogle Scholar
  9. 9.
    Papadopoulou, E., Lee, D.T.: The Min-Max Voronoi diagram of polygonal objects and applications in VLSI manufacturing. In: Bose, P., Morin, P. (eds.) ISAAC 2002. LNCS, vol. 2518, pp. 511–522. Springer, Heidelberg (2002)CrossRefGoogle Scholar
  10. 10.
    Preparata, F.P., Shamos, M.I.: Computational Geometry: an Introduction. Springer, New York (1985)Google Scholar
  11. 11.
    Walker, H., Director, S.W.: VLASIC: A yield simulator for integrated circuits. IEEE Trans. on Computer-Aided Design CAD-5(4), 541–556 (1986)CrossRefGoogle Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2003

Authors and Affiliations

  • Evanthia Papadopoulou
    • 1
  1. 1.IBM TJ Watson Research CenterYorktown HeightsUSA

Personalised recommendations