Abstract
Adiabatic circuits are introduced for ultra-low-power applications. This work presents the impact of the power net on the ideal trapezoidal power supply waveform. An oscillator consisting of four 90-degree shifter is simulated in a 0.13μm CMOS technology providing a conversion efficiency of 85%. The trapezoidal waveform is distorted after a long line because harmonics are inhibited and the signal is delayed. A disturbed phase relationship does not affect energy dissipation and a phase margin larger than 30 degrees is provided. For high frequencies the impact of phase delay on the energy dissipation can be neglected.
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Fischer, J., Amirante, E., Bargagli-Stoffi, A., Teichmann, P., Gruber, D., Schmitt-Landsiedel, D. (2004). Power Supply Net for Adiabatic Circuits. In: Macii, E., Paliouras, V., Koufopavlou, O. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2004. Lecture Notes in Computer Science, vol 3254. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30205-6_43
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DOI: https://doi.org/10.1007/978-3-540-30205-6_43
Publisher Name: Springer, Berlin, Heidelberg
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