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Part of the book series: Lecture Notes in Computer Science ((LNCS,volume 3254))

Abstract

Numerous Dynamic Voltage Scaling (DVS) methods have been proposed over the years, and since several commercial programmable processors supporting DVS are now available, the demand for DVS evaluation tools is obvious. In this paper we propose a simulator based on soft- and hardware parameters that make it possible to get realistic performance evaluations from a high abstraction level. Traditionally, DVS methods have been tested using unrealistic assumptions, both from a software and hardware point of view, but this problem is now alleviated due to our simulator. We show that DVS methods are very depended on the application specification as well as the processor parameters.

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References

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© 2004 Springer-Verlag Berlin Heidelberg

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Olsen, A.B., Büttner, F., Koch, P. (2004). On Combined DVS and Processor Evaluation. In: Macii, E., Paliouras, V., Koufopavlou, O. (eds) Integrated Circuit and System Design. Power and Timing Modeling, Optimization and Simulation. PATMOS 2004. Lecture Notes in Computer Science, vol 3254. Springer, Berlin, Heidelberg. https://doi.org/10.1007/978-3-540-30205-6_34

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  • DOI: https://doi.org/10.1007/978-3-540-30205-6_34

  • Publisher Name: Springer, Berlin, Heidelberg

  • Print ISBN: 978-3-540-23095-3

  • Online ISBN: 978-3-540-30205-6

  • eBook Packages: Springer Book Archive

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