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Deploying Hardware Platforms for SoC Validation: An Industrial Case Study

  • A. Bigot
  • F. Charpentier
  • H. Krupnova
  • I. Sans
Part of the Lecture Notes in Computer Science book series (LNCS, volume 3203)

Abstract

The high complexity of the modern SoC designs ([17]) raises the serious verification challenges. The design verification becomes even more critical because of the constantly shrinking project timescales due to the time to market pressure. The hardware platform based verification is the only one that can cope with the increasing SoC complexity: only in hardware, complex test sequences exercising the complete design can run at a reasonable speed. This paper presents how both emulation and rapid FPGA-based prototyping technologies are deployed in a complementary way in a real industrial environment. Taking two latest highly complex SoC projects as an illustration (3 and 4 million ASIC gates without counting memories), we will describe the integral hardware platform based validation approach. The deployed methodology resulted in a success story for both emulation and rapid prototyping projects for both SoCs.

Keywords

Rapid Prototype Design Team Hardware Platform Industrial Case Study Rapid Prototype Technology 
These keywords were added by machine and not by the authors. This process is experimental and the keywords may be updated as the learning algorithm improves.

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References

  1. 1.
    Hauck, S.: The Roles of FPGAs in Reprogrammable Systems. Proc. Of the IEEE 86(4), 615–639 (1998)CrossRefGoogle Scholar
  2. 2.
    Babb, J., Tessier, R., Dahl, M., Hanono, S.Z., Hoki, D.M., Agrawal, A.: Logic Emulation with Virtual Wires. IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems 16/6, 609–626 (1997)CrossRefGoogle Scholar
  3. 3.
    Tessier, R., Babb, J., Dahl, M., Hanono, S.Z., Agrawal, A.: The Virtual Wires Emulation System: A Gate-Efficient ASIC Prototyping Environment. In: Proc. ACM/SIGDA Int. Symp. On Field Programmable Gate Arrays (1994)Google Scholar
  4. 4.
    Aptix Home Page, http://www.aptix.com
  5. 5.
    System Explorer MP4 Reference Guide, Aptix (1999)Google Scholar
  6. 6.
    Aptix Product Datasheet: Xilinx Virtex-II FPGA Module (May 2002)Google Scholar
  7. 7.
  8. 8.
  9. 9.
    Pavesi, M.: Modern FPGA capabilities made available to the FlexBench modular rapid prototyping platform. In: Proc. DATE 2002 (2002)Google Scholar
  10. 10.
    Mentor Graphics Accelerated Verification/Emulation page, http://www.mentor.com/celaro
  11. 11.
    Xilinx, Virtex-II Platform FPGA Handbook (December 2000)Google Scholar
  12. 12.
    Betz, V., Rose, J., Marquardt, A.: Architecture and CAD for Deep-submicron FPGAs. Kluwer Academic Publishers, Dordrecht (1999)Google Scholar
  13. 13.
    Brown, S.D., Francis, R.J., Rose, J., Vranesic, Z.G.: Field-Programmable Gate Arrays. Kluwer Academic Publishers, Dordrecht (1992)zbMATHGoogle Scholar
  14. 14.
    Bhatia, V., Shtil, S.: Rapid Prototyping Technology Accelerates Software Development of Complex Network Systems. In: Proc. RSP, pp. 113–115 (1998)Google Scholar
  15. 15.
    Courtoy, M.: Rapid System Prototyping for Real-Time Design Validation. In: Proc. RSP, pp. 108–112 (1998)Google Scholar
  16. 16.
    Harbich, K., Stohmann, J., Barke, E., Schwoerer, L.: A Case Study: Logic Emulation – Pitfalls and Solutions. In: Proc. RSP, pp. 160–163 (1999)Google Scholar
  17. 17.
    Chang, H., et al.: Surviving the SOC Revolution: a Guide to Platform-Based Design. Kluwer Academic Publishers, Dordrecht (1999)Google Scholar

Copyright information

© Springer-Verlag Berlin Heidelberg 2004

Authors and Affiliations

  • A. Bigot
    • 1
  • F. Charpentier
    • 1
  • H. Krupnova
    • 1
  • I. Sans
    • 1
  1. 1.CMG/FMVG, ST MicroelectronicsGrenoble CedexFrance

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